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https://github.com/openhwgroup/cvw
synced 2025-01-27 15:04:36 +00:00
yay buildroot passes a decent amount of tests now
gets through the first 15k instructions, that's good enough for now also slight change to string parsing in busybear testbench
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@ -27,7 +27,7 @@
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`define BUILDROOT 0
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`define BUSYBEAR 1
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`define BUSYBEAR_FIX_READ {'h10000005}
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`define BUSYBEAR_TEST_VECTORS "/courses/e190ax/busybear_boot_new/"
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`define BUSYBEAR_TEST_VECTORS "/courses/e190ax/busybear_boot/"
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// RV32 or RV64: XLEN = 32 or 64
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`define XLEN 64
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@ -373,9 +373,10 @@ module testbench_busybear();
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`ERROR
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end
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scan_file_PCW = $fscanf(data_file_PCW, "%s\n", PCtextW);
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if (PCtextW != "ret" && PCtextW != "fence" && PCtextW != "nop" && PCtextW != "mret" && PCtextW != "sfence.vma" && PCtextW != "unimp") begin
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scan_file_PC = $fscanf(data_file_PCW, "%s\n", PCtext2W);
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PCtext2W = "";
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while (PCtext2W != "***") begin
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PCtextW = {PCtextW, " ", PCtext2W};
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scan_file_PC = $fscanf(data_file_PCW, "%s\n", PCtext2W);
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end
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scan_file_PCW = $fscanf(data_file_PCW, "%x\n", InstrWExpected);
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// then expected PC value
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@ -429,9 +430,10 @@ module testbench_busybear();
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`ERROR
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end
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scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext);
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if (PCtext != "ret" && PCtext != "fence" && PCtext != "nop" && PCtext != "mret" && PCtext != "sfence.vma" && PCtext != "unimp") begin
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scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext2);
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PCtext2 = "";
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while (PCtext2 != "***") begin
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PCtext = {PCtext, " ", PCtext2};
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scan_file_PC = $fscanf(data_file_PC, "%s\n", PCtext2);
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end
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scan_file_PC = $fscanf(data_file_PC, "%x\n", CheckInstrD);
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if(dut.hart.ifu.PCD === pcExpected) begin
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