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busybear: better instrF checking

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So this now checks instrF only when StallD is low. @kaveh I'd love your
opinion on this. I don't know if this is a good idea or not. Ideally we
should probably be checking InstrRawD instead, but I kind of want to stay
checking the instr in the F stage instead of D for now. Idk if this is worth
staying in F, I can't really see any big downsides to checking the instruction in
D except that PCD isn't an external signal, but neither is StallD, so.....
Anyway I'd love others' thoughts on this
This commit is contained in:
Noah Boorstin 2021-03-08 19:48:12 +00:00
parent 1b206d5a3c
commit c780a25f92
2 changed files with 101 additions and 99 deletions
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4
wally-pipelined/regression/wally-busybear.do
View File

@ -54,7 +54,9 @@ add wave -hex /testbench_busybear/PCtext
add wave -hex /testbench_busybear/pcExpected
add wave -hex /testbench_busybear/dut/hart/ifu/PCF
add wave -hex /testbench_busybear/dut/hart/ifu/InstrF
add wave -hex /testbench_busybear/dut/InstrF
add wave -hex /testbench_busybear/dut/hart/ifu/StallD
add wave -hex /testbench_busybear/dut/hart/ifu/FlushD
add wave -hex /testbench_busybear/dut/hart/ifu/InstrRawD
add wave /testbench_busybear/CheckInstrF
add wave /testbench_busybear/lastCheckInstrF
add wave /testbench_busybear/speculative

10
wally-pipelined/testbench/testbench-busybear.sv
View File

@ -162,10 +162,10 @@ module testbench_busybear();
$display("%0t ps, instr %0d: rf[%0d] does not equal rf expected: %x, %x", $time, instrs, i, dut.hart.ieu.dp.regf.rf[i], regExpected);
`ERROR
end
if (dut.hart.ieu.dp.regf.rf[i] !== regExpected) begin
force dut.hart.ieu.dp.regf.rf[i] = regExpected;
release dut.hart.ieu.dp.regf.rf[i];
end
//if (dut.hart.ieu.dp.regf.rf[i] !== regExpected) begin
// force dut.hart.ieu.dp.regf.rf[i] = regExpected;
// release dut.hart.ieu.dp.regf.rf[i];
//end
end
end
end
@ -348,7 +348,7 @@ module testbench_busybear();
always @(dut.PCF or dut.hart.ifu.InstrF or reset) begin
if(~HWRITE) begin
#3;
if (~reset && dut.hart.ifu.InstrF[15:0] !== {16{1'bx}}) begin
if (~reset && dut.hart.ifu.InstrF[15:0] !== {16{1'bx}} && ~dut.hart.StallD) begin
if (dut.PCF !== lastPCF) begin
lastCheckInstrF = CheckInstrF;
lastPC <= dut.PCF;