renamed sim-fp to sim-testfloat

pipelined/regression/sim-fp64

@@ -1 +0,0 @@
-vsim -do wally-fp64.do

pipelined/regression/sim-fp64-batch

@@ -1,3 +0,0 @@
-vsim -c <<!
-do wally-fp64-batch.do rv64gc imperas64d
-!

pipelined/regression/sim-testfloat

@@ -9,4 +9,4 @@
 # sqrt   - test square ro
 # all    - test everything
 
-vsim -do "do fp.do rv64fpquad cmp"
+vsim -do "do testfloat.do rv64fpquad cmp"

pipelined/regression/sim-testfloat-batch

@@ -7,4 +7,4 @@
 # sqrt   - test square root
 # all    - test everything
 
-vsim -c -do "do fp.do rv64fpquad all"
+vsim -c -do "do testfloat.do rv64fpquad all"

pipelined/regression/wally-fp64-batch.do

@@ -1,50 +0,0 @@
-# wally-pipelined-batch.do 
-#
-# Modification by Oklahoma State University & Harvey Mudd College
-# Use with Testbench 
-# James Stine, 2008; David Harris 2021
-# Go Cowboys!!!!!!
-#
-# Takes 1:10 to run RV64IC tests using gui
-
-# Usage: do wally-pipelined-batch.do <config> <testcases>
-# Example: do wally-pipelined-batch.do rv32ic imperas-32i
-
-# Use this wally-pipelined-batch.do file to run this example.
-# Either bring up ModelSim and type the following at the "ModelSim>" prompt:
-#     do wally-pipelined-batch.do
-# or, to run from a shell, type the following at the shell prompt:
-#     vsim -do wally-pipelined-batch.do -c
-# (omit the "-c" to see the GUI while running from the shell)
-
-onbreak {resume}
-
-# create library
-if [file exists work_${1}_${2}] {
-    vdel -lib work_${1}_${2} -all
-}
-vlib work_${1}_${2}
-
-# compile source files
-# suppress spurious warnngs about 
-# "Extra checking for conflicts with always_comb done at vopt time"
-# because vsim will run vopt
-
-# default to config/rv64ic, but allow this to be overridden at the command line.  For example:
-# do wally-pipelined-batch.do ../config/rv32ic rv32ic
-vlog -work work_${1}_${2} +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-f64.sv ../testbench/common/*.sv   ../src/*/*.sv -suppress 2583
-
-# start and run simulation
-# remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vopt work_${1}_${2}.testbench -work work_${1}_${2} -G TEST=$2 -o testbenchopt
-vsim -lib work_${1}_${2} testbenchopt 
-# Adding coverage increases runtime from 2:00 to 4:29.  Can't run it all the time
-#vopt work_$2.testbench -work work_$2 -o workopt_$2 +cover=sbectf
-#vsim -coverage -lib work_$2 workopt_$2
-
-run -all
-#coverage report -file wally-pipelined-coverage.txt
-# These aren't doing anything helpful
-#coverage report -memory 
-#profile report -calltree -file wally-pipelined-calltree.rpt -cutoff 2
-quit

pipelined/regression/wally-fp64.do

@@ -1,54 +0,0 @@
-# wally-pipelined.do 
-#
-# Modification by Oklahoma State University & Harvey Mudd College
-# Use with Testbench 
-# James Stine, 2008; David Harris 2021
-# Go Cowboys!!!!!!
-#
-# Takes 1:10 to run RV64IC tests using gui
-
-# run with vsim -do "do wally-pipelined.do rv64ic riscvarchtest-64m"
-
-# Use this wally-pipelined.do file to run this example.
-# Either bring up ModelSim and type the following at the "ModelSim>" prompt:
-#     do wally-pipelined.do
-# or, to run from a shell, type the following at the shell prompt:
-#     vsim -do wally-pipelined.do -c
-# (omit the "-c" to see the GUI while running from the shell)
-
-onbreak {resume}
-
-# create library
-if [file exists work] {
-    vdel -all
-}
-vlib work
-
-# compile source files
-# suppress spurious warnngs about 
-# "Extra checking for conflicts with always_comb done at vopt time"
-# because vsim will run vopt
-
-# default to config/rv64ic, but allow this to be overridden at the command line.  For example:
-# do wally-pipelined.do ../config/rv32ic
-#switch $argc {
-#    0 {vlog +incdir+../config/rv64ic +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv -suppress 2583}
-#    1 {vlog +incdir+$1  +incdir+../config/shared ../testbench/testbench.sv ../testbench/common/*.sv ../src/*/*.sv -suppress 2583}
-#}
-# start and run simulation
-# remove +acc flag for faster sim during regressions if there is no need to access internal signals
-vlog +incdir+../config/rv64gc +incdir+../config/shared ../testbench/testbench-f64.sv ../testbench/common/*.sv   ../src/*/*.sv -suppress 2583
-vopt +acc work.testbench -G TEST=imperas64d -o workopt 
-vsim workopt
-
-view wave
--- display input and output signals as hexidecimal values
-do ./wave-dos/generic.do
-
--- Run the Simulation 
-#run 3600 
-run -all
-#quit
-#noview ../testbench/testbench-imperas.sv
-noview ../testbench/testbench.sv
-view wave