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https://github.com/openhwgroup/cvw
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cleanup of cvw top
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9b8aa188f8
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250
src/cvw.sv
250
src/cvw.sv
@ -37,12 +37,12 @@ package cvw;
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`include "BranchPredictorType.vh"
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`include "BranchPredictorType.vh"
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typedef struct packed {
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typedef struct packed {
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int XLEN; // Machine width (32 or 64)
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int XLEN; // Machine width (32 or 64)
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logic IEEE754; // IEEE754 NaN handling (0 = use RISC-V NaN propagation instead)
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logic IEEE754; // IEEE754 NaN handling (0 = use RISC-V NaN propagation instead)
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int MISA; // Machine Instruction Set Architecture
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int MISA; // Machine Instruction Set Architecture
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int AHBW; // AHB bus width (usually = XLEN)
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int AHBW; // AHB bus width (usually = XLEN)
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int RAM_LATENCY; // Latency to stress AHB
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int RAM_LATENCY; // Latency to stress AHB
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logic BURST_EN; // Support AHB Burst Mode
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logic BURST_EN; // Support AHB Burst Mode
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// RISC-V Features
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// RISC-V Features
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logic ZICSR_SUPPORTED;
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logic ZICSR_SUPPORTED;
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@ -74,12 +74,12 @@ typedef struct packed {
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logic DCACHE_SUPPORTED;
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logic DCACHE_SUPPORTED;
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logic ICACHE_SUPPORTED;
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logic ICACHE_SUPPORTED;
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// TLB configuration. Entries should be a power of 2
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// TLB configuration. Entries should be a power of 2
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int ITLB_ENTRIES;
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int ITLB_ENTRIES;
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int DTLB_ENTRIES;
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int DTLB_ENTRIES;
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// Cache configuration. Sizes should be a power of two
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// Cache configuration. Sizes should be a power of two
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// typical configuration 4 ways, 4096 ints per way, 256 bit or more lines
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// typical configuration 4 ways, 4096 ints per way, 256 bit or more lines
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int DCACHE_NUMWAYS;
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int DCACHE_NUMWAYS;
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int DCACHE_WAYSIZEINBYTES;
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int DCACHE_WAYSIZEINBYTES;
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int DCACHE_LINELENINBITS;
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int DCACHE_LINELENINBITS;
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@ -88,23 +88,23 @@ typedef struct packed {
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int ICACHE_LINELENINBITS;
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int ICACHE_LINELENINBITS;
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int CACHE_SRAMLEN;
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int CACHE_SRAMLEN;
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// Integer Divider Configuration
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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int IDIV_BITSPERCYCLE;
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int IDIV_BITSPERCYCLE;
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logic IDIV_ON_FPU;
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logic IDIV_ON_FPU;
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// Legal number of PMP entries are 0, 16, or 64
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// Legal number of PMP entries are 0, 16, or 64
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int PMP_ENTRIES;
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int PMP_ENTRIES;
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// Address space
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// Address space
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logic [63:0] RESET_VECTOR;
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logic [63:0] RESET_VECTOR;
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// WFI Timeout Wait
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// WFI Timeout Wait
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int WFI_TIMEOUT_BIT;
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int WFI_TIMEOUT_BIT;
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// Peripheral Addresses
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// Peripheral Addresses
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// Peripheral memory space extends from BASE to BASE+RANGE
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// Peripheral memory space extends from BASE to BASE+RANGE
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// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
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// Range should be a thermometer code with 0's in the upper bits and 1s in the lower bits
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logic DTIM_SUPPORTED;
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logic DTIM_SUPPORTED;
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logic [63:0] DTIM_BASE;
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logic [63:0] DTIM_BASE;
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logic [63:0] DTIM_RANGE;
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logic [63:0] DTIM_RANGE;
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@ -141,16 +141,16 @@ typedef struct packed {
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logic [63:0] SPI_BASE;
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logic [63:0] SPI_BASE;
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logic [63:0] SPI_RANGE;
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logic [63:0] SPI_RANGE;
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// Test modes
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// Test modes
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// Tie GPIO outputs back to inputs
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// Tie GPIO outputs back to inputs
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logic GPIO_LOOPBACK_TEST;
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logic GPIO_LOOPBACK_TEST;
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logic SPI_LOOPBACK_TEST;
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logic SPI_LOOPBACK_TEST;
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// Hardware configuration
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// Hardware configuration
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int UART_PRESCALE ;
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int UART_PRESCALE ;
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// Interrupt configuration
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// Interrupt configuration
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int PLIC_NUM_SRC;
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int PLIC_NUM_SRC;
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logic PLIC_NUM_SRC_LT_32;
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logic PLIC_NUM_SRC_LT_32;
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int PLIC_GPIO_ID;
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int PLIC_GPIO_ID;
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@ -158,31 +158,31 @@ typedef struct packed {
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int PLIC_SPI_ID;
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int PLIC_SPI_ID;
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int PLIC_SDC_ID;
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int PLIC_SDC_ID;
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logic BPRED_SUPPORTED;
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logic BPRED_SUPPORTED;
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logic [31:0] BPRED_TYPE;
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logic [31:0] BPRED_TYPE;
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int BPRED_NUM_LHR;
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int BPRED_NUM_LHR;
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int BPRED_SIZE;
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int BPRED_SIZE;
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int BTB_SIZE;
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int BTB_SIZE;
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int RAS_SIZE;
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int RAS_SIZE;
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logic INSTR_CLASS_PRED; // is class predictor enabled
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logic INSTR_CLASS_PRED; // is class predictor enabled
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// FPU division architecture
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// FPU division architecture
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int RADIX;
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int RADIX;
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int DIVCOPIES;
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int DIVCOPIES;
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// bit manipulation
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// bit manipulation
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logic ZBA_SUPPORTED;
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logic ZBA_SUPPORTED;
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logic ZBB_SUPPORTED;
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logic ZBB_SUPPORTED;
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logic ZBC_SUPPORTED;
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logic ZBC_SUPPORTED;
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logic ZBS_SUPPORTED;
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logic ZBS_SUPPORTED;
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// compressed
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// compressed
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logic ZCA_SUPPORTED;
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logic ZCA_SUPPORTED;
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logic ZCB_SUPPORTED;
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logic ZCB_SUPPORTED;
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logic ZCD_SUPPORTED;
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logic ZCD_SUPPORTED;
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logic ZCF_SUPPORTED;
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logic ZCF_SUPPORTED;
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// Cryptography
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// Cryptography
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logic ZBKB_SUPPORTED;
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logic ZBKB_SUPPORTED;
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logic ZBKC_SUPPORTED;
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logic ZBKC_SUPPORTED;
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logic ZBKX_SUPPORTED;
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logic ZBKX_SUPPORTED;
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@ -191,112 +191,112 @@ typedef struct packed {
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logic ZKNH_SUPPORTED;
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logic ZKNH_SUPPORTED;
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logic ZKN_SUPPORTED;
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logic ZKN_SUPPORTED;
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// Memory synthesis configuration
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// Memory synthesis configuration
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logic USE_SRAM;
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logic USE_SRAM;
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// constants defining different privilege modes
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// constants defining different privilege modes
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// defined in Table 1.1 of the privileged spec
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// defined in Table 1.1 of the privileged spec
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logic [1:0] M_MODE ;
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logic [1:0] M_MODE ;
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logic [1:0] S_MODE ;
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logic [1:0] S_MODE ;
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logic [1:0] U_MODE ;
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logic [1:0] U_MODE ;
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// Virtual Memory Constants
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// Virtual Memory Constants
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int VPN_SEGMENT_BITS;
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int VPN_SEGMENT_BITS;
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int VPN_BITS;
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int VPN_BITS;
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int PPN_BITS;
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int PPN_BITS;
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int PA_BITS;
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int PA_BITS;
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int SVMODE_BITS;
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int SVMODE_BITS;
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int ASID_BASE;
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int ASID_BASE;
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int ASID_BITS;
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int ASID_BITS;
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// constants to check SATP_MODE against
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// constants to check SATP_MODE against
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// defined in Table 4.3 of the privileged spec
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// defined in Table 4.3 of the privileged spec
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logic [3:0] NO_TRANSLATE;
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logic [3:0] NO_TRANSLATE;
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logic [3:0] SV32;
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logic [3:0] SV32;
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logic [3:0] SV39;
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logic [3:0] SV39;
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logic [3:0] SV48;
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logic [3:0] SV48;
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// macros to define supported modes
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// macros to define supported modes
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logic A_SUPPORTED;
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logic A_SUPPORTED;
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logic B_SUPPORTED;
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logic B_SUPPORTED;
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logic C_SUPPORTED;
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logic C_SUPPORTED;
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logic D_SUPPORTED;
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logic D_SUPPORTED;
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logic E_SUPPORTED;
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logic E_SUPPORTED;
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logic F_SUPPORTED;
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logic F_SUPPORTED;
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logic I_SUPPORTED;
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logic I_SUPPORTED;
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logic M_SUPPORTED;
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logic M_SUPPORTED;
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logic Q_SUPPORTED;
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logic Q_SUPPORTED;
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logic S_SUPPORTED;
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logic S_SUPPORTED;
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logic U_SUPPORTED;
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logic U_SUPPORTED;
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// logarithm of XLEN, used for number of index bits to select
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// logarithm of XLEN, used for number of index bits to select
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int LOG_XLEN;
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int LOG_XLEN;
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// Number of 64 bit PMP Configuration Register entries (or pairs of 32 bit entries)
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// Number of 64 bit PMP Configuration Register entries (or pairs of 32 bit entries)
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int PMPCFG_ENTRIES;
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int PMPCFG_ENTRIES;
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// Floating point constants for Quad, Double, Single, and Half precisions
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// Floating point constants for Quad, Double, Single, and Half precisions
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int Q_LEN;
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int Q_LEN;
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int Q_NE;
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int Q_NE;
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int Q_NF;
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int Q_NF;
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int Q_BIAS;
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int Q_BIAS;
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logic [1:0] Q_FMT;
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logic [1:0] Q_FMT;
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int D_LEN;
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int D_LEN;
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int D_NE;
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int D_NE;
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int D_NF;
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int D_NF;
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int D_BIAS;
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int D_BIAS;
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logic [1:0] D_FMT;
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logic [1:0] D_FMT;
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int S_LEN;
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int S_LEN;
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int S_NE;
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int S_NE;
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int S_NF;
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int S_NF;
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int S_BIAS;
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int S_BIAS;
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logic [1:0] S_FMT;
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logic [1:0] S_FMT;
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int H_LEN;
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int H_LEN;
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int H_NE;
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int H_NE;
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int H_NF;
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int H_NF;
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int H_BIAS;
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int H_BIAS;
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logic [1:0] H_FMT;
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logic [1:0] H_FMT;
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// Floating point length FLEN and number of exponent (NE) and fraction (NF) bits
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// Floating point length FLEN and number of exponent (NE) and fraction (NF) bits
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int FLEN;
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int FLEN;
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int LOGFLEN;
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int LOGFLEN;
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int NE ;
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int NE;
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int NF ;
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int NF;
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logic [1:0] FMT ;
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logic [1:0] FMT;
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int BIAS;
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int BIAS;
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// Floating point constants needed for FPU paramerterization
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// Floating point constants needed for FPU paramerterization
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int FPSIZES;
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int FPSIZES;
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int FMTBITS;
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int FMTBITS;
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int LEN1 ;
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int LEN1;
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int NE1 ;
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int NE1;
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int NF1 ;
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int NF1;
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logic [1:0] FMT1 ;
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logic [1:0] FMT1;
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int BIAS1;
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int BIAS1;
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int LEN2 ;
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int LEN2;
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int NE2 ;
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int NE2;
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int NF2 ;
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int NF2;
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logic [1:0] FMT2 ;
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logic [1:0] FMT2;
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int BIAS2;
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int BIAS2;
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// largest length in IEU/FPU
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// largest length in IEU/FPU
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int CVTLEN;
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int CVTLEN;
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int LLEN;
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int LLEN;
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int LOGCVTLEN;
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int LOGCVTLEN;
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int NORMSHIFTSZ;
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int NORMSHIFTSZ;
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int LOGNORMSHIFTSZ;
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int LOGNORMSHIFTSZ;
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int FMALEN;
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int FMALEN;
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// division constants
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// division constants
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int LOGR ;
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int LOGR;
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int RK ;
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int RK;
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int FPDUR ;
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int FPDUR;
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int DURLEN ;
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int DURLEN;
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int DIVb ;
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int DIVb;
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int DIVBLEN ;
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int DIVBLEN;
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// Debug Module
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// Debug Module
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logic DEBUG_SUPPORTED;
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logic DEBUG_SUPPORTED;
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} cvw_t;
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} cvw_t;
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endpackage
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endpackage
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