diff --git a/wally-pipelined/src/cache/icachefsm.sv b/wally-pipelined/src/cache/icachefsm.sv
index eb7543771..cfbff3797 100644
--- a/wally-pipelined/src/cache/icachefsm.sv
+++ b/wally-pipelined/src/cache/icachefsm.sv
@@ -128,6 +128,9 @@ module icachefsm
       STATE_READY: begin
         SelAdr = 2'b00;
         ICacheReadEn = 1'b1;
+		if(IgnoreRequest) begin
+		  NextState = STATE_READY;
+		end else 
 		if(ITLBMissF) begin
 		  NextState = STATE_READY;
 		  SelAdr = 2'b01;
diff --git a/wally-pipelined/src/ifu/ifu.sv b/wally-pipelined/src/ifu/ifu.sv
index 31ca6d163..242f57fc5 100644
--- a/wally-pipelined/src/ifu/ifu.sv
+++ b/wally-pipelined/src/ifu/ifu.sv
@@ -244,7 +244,8 @@ module ifu (
 
   assign IfuStallF = ICacheStallF | BusStall;
 
-  assign IgnoreRequest = ITLBMissF | ExceptionM | PendingInterruptM;
+  //assign IgnoreRequest = ITLBMissF | ExceptionM | PendingInterruptM;
+  assign IgnoreRequest = ITLBMissF;