From c44ae93e22aeb0842ed21e18208d52a43c04bdab Mon Sep 17 00:00:00 2001
From: David Harris <David_Harris@hmc.edu>
Date: Sun, 12 Nov 2023 20:23:27 -0800
Subject: [PATCH] DivStickyM no longer mysteriously needs to be gated with
 SqrtM after divder improvemenst

---
 src/fpu/fdivsqrt/fdivsqrtpostproc.sv | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/src/fpu/fdivsqrt/fdivsqrtpostproc.sv b/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
index 0b358909a..5a40a3bdc 100644
--- a/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
+++ b/src/fpu/fdivsqrt/fdivsqrtpostproc.sv
@@ -86,8 +86,7 @@ module fdivsqrtpostproc import cvw::*;  #(parameter cvw_t P) (
   //////////////////////////
 
   //  If the result is not exact, the sticky should be set
-//  assign DivStickyM = ~WZeroM & ~(SpecialCaseM & SqrtM); // ***unsure why SpecialCaseM has to be gated by SqrtM, but otherwise fails regression on divide
-  assign DivStickyM = ~WZeroM & ~(SpecialCaseM); 
+  assign DivStickyM = ~WZeroM & ~SpecialCaseM; 
 
   // Determine if sticky bit is negative 
   assign Sum = WC + WS;