Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Flipped crossbar inputs and outputs to correctly place masters.

Browse Source
This commit is contained in:
Jacob Pease 2023-01-27 14:57:36 -06:00
parent 4c2cdf9ab1
commit c36d32f850
1 changed files with 74 additions and 74 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

148
fpga/src/fpgaTop.v
View File

@ -543,84 +543,84 @@ module fpgaTop
.aresetn(peripheral_aresetn),
// Connect Masters
.s_axi_awid({m_axi_awid, 8'b0}),
.s_axi_awaddr({m_axi_awaddr, m01_axi_awaddr}),
.s_axi_awlen({m_axi_awlen, m01_axi_awlen}),
.s_axi_awsize({m_axi_awsize, m01_axi_awsize}),
.s_axi_awburst({m_axi_awburst, m01_axi_awburst}),
.s_axi_awlock({m_axi_awlock, m01_axi_awlock}),
.s_axi_awcache({m_axi_awcache, m01_axi_awcache}),
.s_axi_awprot({m_axi_awprot, m01_axi_awprot}),
.s_axi_awid({8'b0, m_axi_awid}),
.s_axi_awaddr({m01_axi_awaddr, m_axi_awaddr}),
.s_axi_awlen({m01_axi_awlen, m_axi_awlen}),
.s_axi_awsize({m01_axi_awsize, m_axi_awsize}),
.s_axi_awburst({m01_axi_awburst, m_axi_awburst}),
.s_axi_awlock({m01_axi_awlock, m_axi_awlock}),
.s_axi_awcache({m01_axi_awcache, m_axi_awcache}),
.s_axi_awprot({m01_axi_awprot, m_axi_awprot}),
.s_axi_awqos(8'b0),
.s_axi_awvalid({m_axi_awvalid, m01_axi_awvalid}),
.s_axi_awready({m_axi_awready, m01_axi_awready}),
.s_axi_wdata({m_axi_wdata, m01_axi_wdata}),
.s_axi_wstrb({m_axi_wstrb, m01_axi_wstrb}),
.s_axi_wlast({m_axi_wlast, m01_axi_wlast}),
.s_axi_wvalid({m_axi_wvalid, m01_axi_wvalid}),
.s_axi_wready({m_axi_wready, m01_axi_wready}),
.s_axi_bid({m_axi_bid, m01_axi_bid}),
.s_axi_bresp({m_axi_bresp, m01_axi_bresp}),
.s_axi_bvalid({m_axi_bvalid, m01_axi_bvalid}),
.s_axi_bready({m_axi_bready, m01_axi_bready}),
.s_axi_arid({m_axi_arid, 8'b0}),
.s_axi_araddr({m_axi_araddr, m01_axi_araddr}),
.s_axi_arlen({m_axi_arlen, m01_axi_arlen}),
.s_axi_arsize({m_axi_arsize, m01_axi_arsize}),
.s_axi_arburst({m_axi_arburst, m01_axi_arburst}),
.s_axi_arlock({m_axi_arlock, m01_axi_arlock}),
.s_axi_arcache({m_axi_arcache, m01_axi_arcache}),
.s_axi_arprot({m_axi_arprot, m01_axi_arprot}),
.s_axi_awvalid({m01_axi_awvalid, m_axi_awvalid}),
.s_axi_awready({m01_axi_awready, m_axi_awready}),
.s_axi_wdata({m01_axi_wdata, m_axi_wdata}),
.s_axi_wstrb({m01_axi_wstrb, m_axi_wstrb}),
.s_axi_wlast({m01_axi_wlast, m_axi_wlast}),
.s_axi_wvalid({m01_axi_wvalid, m_axi_wvalid}),
.s_axi_wready({m01_axi_wready, m_axi_wready}),
.s_axi_bid({m01_axi_bid, m_axi_bid}),
.s_axi_bresp({m01_axi_bresp, m_axi_bresp}),
.s_axi_bvalid({m01_axi_bvalid, m_axi_bvalid}),
.s_axi_bready({m01_axi_bready, m_axi_bready}),
.s_axi_arid({8'b0, m_axi_arid}),
.s_axi_araddr({m01_axi_araddr, m_axi_araddr}),
.s_axi_arlen({m01_axi_arlen, m_axi_arlen}),
.s_axi_arsize({m01_axi_arsize, m_axi_arsize}),
.s_axi_arburst({m01_axi_arburst, m_axi_arburst}),
.s_axi_arlock({m01_axi_arlock, m_axi_arlock}),
.s_axi_arcache({m01_axi_arcache, m_axi_arcache}),
.s_axi_arprot({m01_axi_arprot, m_axi_arprot}),
.s_axi_arqos(8'b0),
.s_axi_arvalid({m_axi_arvalid, m01_axi_arvalid}),
.s_axi_arready({m_axi_arready, m01_axi_arready}),
.s_axi_rid({m_axi_rid, m01_axi_rid}),
.s_axi_rdata({m_axi_rdata, m01_axi_rdata}),
.s_axi_rresp({m_axi_rresp, m01_axi_rresp}),
.s_axi_rlast({m_axi_rlast, m01_axi_rlast}),
.s_axi_rvalid({m_axi_rvalid, m01_axi_rvalid}),
.s_axi_rready({m_axi_rready, m01_axi_rready}),
.s_axi_arvalid({m01_axi_arvalid, m_axi_arvalid}),
.s_axi_arready({m01_axi_arready, m_axi_arready}),
.s_axi_rid({m01_axi_rid, m_axi_rid}),
.s_axi_rdata({m01_axi_rdata, m_axi_rdata}),
.s_axi_rresp({m01_axi_rresp, m_axi_rresp}),
.s_axi_rlast({m01_axi_rlast, m_axi_rlast}),
.s_axi_rvalid({m01_axi_rvalid, m_axi_rvalid}),
.s_axi_rready({m01_axi_rready, m_axi_rready}),
// Connect Slaves
.m_axi_awid({s00_axi_awid, s01_axi_awid}),
.m_axi_awlen({s00_axi_awlen, s01_axi_awlen}),
.m_axi_awsize({s00_axi_awsize, s01_axi_awsize}),
.m_axi_awburst({s00_axi_awburst, s01_axi_awburst}),
.m_axi_awcache({s00_axi_awcache, s01_axi_awcache}),
.m_axi_awaddr({s00_axi_awaddr, s01_axi_awaddr}),
.m_axi_awprot({s00_axi_awprot, s01_axi_awprot}),
.m_axi_awregion({s00_axi_awregion, s01_axi_awregion}),
.m_axi_awqos({s00_axi_awqos, s01_axi_awqos}),
.m_axi_awvalid({s00_axi_awvalid, s01_axi_awvalid}),
.m_axi_awready({s00_axi_awready, s01_axi_awready}),
.m_axi_awlock({s00_axi_awlock, s01_axi_awlock}),
.m_axi_wdata({s00_axi_wdata, s01_axi_wdata}),
.m_axi_wstrb({s00_axi_wstrb, s01_axi_wstrb}),
.m_axi_wlast({s00_axi_wlast, s01_axi_wlast}),
.m_axi_wvalid({s00_axi_wvalid, s01_axi_wvalid}),
.m_axi_wready({s00_axi_wready, s01_axi_wready}),
.m_axi_bid({s00_axi_bid, 8'b0}),
.m_axi_bresp({s00_axi_bresp, s01_axi_bresp}),
.m_axi_bvalid({s00_axi_bvalid, s01_axi_bvalid}),
.m_axi_bready({s00_axi_bready, s01_axi_bready}),
.m_axi_arid({s00_axi_arid, s01_axi_arid}),
.m_axi_arlen({s00_axi_arlen, s01_axi_arlen}),
.m_axi_arsize({s00_axi_arsize, s01_axi_arsize}),
.m_axi_arburst({s00_axi_arburst, s01_axi_arburst}),
.m_axi_arprot({s00_axi_arprot, s01_axi_arprot}),
.m_axi_arregion({s00_axi_arregion, s01_axi_arregion}),
.m_axi_arqos({s00_axi_arqos, s01_axi_arqos}),
.m_axi_arcache({s00_axi_arcache, s01_axi_arcache}),
.m_axi_arvalid({s00_axi_arvalid, s01_axi_arvalid}),
.m_axi_araddr({s00_axi_araddr, s01_axi_araddr}),
.m_axi_arlock({s00_axi_arlock, s01_axi_arlock}),
.m_axi_arready({s00_axi_arready, s01_axi_arready}),
.m_axi_rid({s00_axi_rid, 8'b0}),
.m_axi_rdata({s00_axi_rdata, s01_axi_rdata}),
.m_axi_rresp({s00_axi_rresp, s01_axi_rresp}),
.m_axi_rvalid({s00_axi_rvalid, s01_axi_rvalid}),
.m_axi_rlast({s00_axi_rlast, s01_axi_rlast}),
.m_axi_rready({s00_axi_rready, s01_axi_rready})
.m_axi_awid({s01_axi_awid, s00_axi_awid}),
.m_axi_awlen({s01_axi_awlen, s00_axi_awlen}),
.m_axi_awsize({s01_axi_awsize, s00_axi_awsize}),
.m_axi_awburst({s01_axi_awburst, s00_axi_awburst}),
.m_axi_awcache({s01_axi_awcache, s00_axi_awcache}),
.m_axi_awaddr({s01_axi_awaddr, s00_axi_awaddr}),
.m_axi_awprot({s01_axi_awprot, s00_axi_awprot}),
.m_axi_awregion({s01_axi_awregion, s00_axi_awregion}),
.m_axi_awqos({s01_axi_awqos, s00_axi_awqos}),
.m_axi_awvalid({s01_axi_awvalid, s00_axi_awvalid}),
.m_axi_awready({s01_axi_awready, s00_axi_awready}),
.m_axi_awlock({s01_axi_awlock, s00_axi_awlock}),
.m_axi_wdata({s01_axi_wdata, s00_axi_wdata}),
.m_axi_wstrb({s01_axi_wstrb, s00_axi_wstrb}),
.m_axi_wlast({s01_axi_wlast, s00_axi_wlast}),
.m_axi_wvalid({s01_axi_wvalid, s00_axi_wvalid}),
.m_axi_wready({s01_axi_wready, s00_axi_wready}),
.m_axi_bid({8'b0, s00_axi_bid}),
.m_axi_bresp({s01_axi_bresp, s00_axi_bresp}),
.m_axi_bvalid({s01_axi_bvalid, s00_axi_bvalid}),
.m_axi_bready({s01_axi_bready, s00_axi_bready}),
.m_axi_arid({s01_axi_arid, s00_axi_arid}),
.m_axi_arlen({s01_axi_arlen, s00_axi_arlen}),
.m_axi_arsize({s01_axi_arsize, s00_axi_arsize}),
.m_axi_arburst({s01_axi_arburst, s00_axi_arburst}),
.m_axi_arprot({s01_axi_arprot, s00_axi_arprot}),
.m_axi_arregion({s01_axi_arregion, s00_axi_arregion}),
.m_axi_arqos({s01_axi_arqos, s00_axi_arqos}),
.m_axi_arcache({s01_axi_arcache, s00_axi_arcache}),
.m_axi_arvalid({s01_axi_arvalid, s00_axi_arvalid}),
.m_axi_araddr({s01_axi_araddr, s00_axi_araddr}),
.m_axi_arlock({s01_axi_arlock, s00_axi_arlock}),
.m_axi_arready({s01_axi_arready, s00_axi_arready}),
.m_axi_rid({8'b0, s00_axi_rid}),
.m_axi_rdata({s01_axi_rdata, s00_axi_rdata}),
.m_axi_rresp({s01_axi_rresp, s00_axi_rresp}),
.m_axi_rvalid({s01_axi_rvalid, s00_axi_rvalid}),
.m_axi_rlast({s01_axi_rlast, s00_axi_rlast}),
.m_axi_rready({s01_axi_rready, s00_axi_rready})
);
// -----------------------------------------------------