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Fixed bug caused by errant tab size in probe script.

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This commit is contained in:
Jacob Pease 2023-08-16 12:20:08 -05:00
parent 63e901e981
commit c2f2bef433
1 changed files with 8 additions and 6 deletions
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14
fpga/probe
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@ -40,19 +40,21 @@ def probeBits( probe ):
else:
str = str + f"{{{probe[0]}[{i}]}} "
else:
str = f'{{{probe[0]}}}'
else:
str = f'{{{probe[0]}}}'
return str
def printProbe( probe, i ):
bits = probeBits(probe)
print(bits)
return (
f'create_debug_port u_ila_0 probe\n'
f'set_property port_width {probe[1]} [get_debug_ports u_ila_0/probe{i}]\n'
f'set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe{i}]\n'
f'connect_debug_port u_ila_0/probe{i} [get_nets [list {bits}]]\n\n'
f'create_debug_port u_ila_0 probe\n'
f'set_property port_width {probe[1]} [get_debug_ports u_ila_0/probe{i}]\n'
f'set_property PROBE_TYPE DATA_AND_TRIGGER [get_debug_ports u_ila_0/probe{i}]\n'
f'connect_debug_port u_ila_0/probe{i} [get_nets [list {bits}]]\n\n'
)
def main(args):