mirror of
				https://github.com/openhwgroup/cvw
				synced 2025-02-11 06:05:49 +00:00 
			
		
		
		
	Updating the test bench to include a function radix. Not done.
This commit is contained in:
		
							parent
							
								
									c856003f73
								
							
						
					
					
						commit
						c2cf3f9fb6
					
				@ -1,10 +1,17 @@
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#!/bin/bash
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					#!/bin/bash
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					allProgramRadixFile="FunctionRadix"
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					index=0
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for objDumpFile in "$@";
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					for objDumpFile in "$@";
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do
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					do
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    # get the lines with named labels from the obj files.
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					    # get the lines with named labels from the obj files.
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    listOfAddr=`egrep -i '^[0-9]{8} <[0-9a-zA-Z_]+>' $objDumpFile`
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					    # 64 bit addresses
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					    listOfAddr16=`egrep -i '^[0-9]{16} <[0-9a-zA-Z_]+>' $objDumpFile`
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					    # 32 bit addresses
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					    listOfAddr8=`egrep -i '^[0-9]{8} <[0-9a-zA-Z_]+>' $objDumpFile`
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					    listOfAddr=`echo "$listOfAddr16" "$listOfAddr8"`
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    # parse out the addresses and the labels
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					    # parse out the addresses and the labels
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    addresses=`echo "$listOfAddr" | awk '{print $1}'`
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					    addresses=`echo "$listOfAddr" | awk '{print $1}'`
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@ -29,4 +36,12 @@ do
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    echo "    -default hex -color green" >> $objDumpFile.do
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					    echo "    -default hex -color green" >> $objDumpFile.do
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    echo "}" >> $objDumpFile.do
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					    echo "}" >> $objDumpFile.do
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					    # now create the all in one version
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					    # put the index at the begining of each line
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					    allAddresses=`paste -d'\0' <(printf "%04x" "$index") <(echo "$addresses")`
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					    printf "%04x%s" "$index" "$addresses" >> $allProgramRadixFile.addr
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					    index=$(($index+1))
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done
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					done
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@ -8,13 +8,13 @@ add wave -noupdate -expand -group {Execution Stage} /testbench/InstrEName
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add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
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					add wave -noupdate -expand -group {Execution Stage} /testbench/dut/hart/ifu/InstrE
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add wave -noupdate -divider <NULL>
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					add wave -noupdate -divider <NULL>
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add wave -noupdate /testbench/dut/hart/ebu/IReadF
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					add wave -noupdate /testbench/dut/hart/ebu/IReadF
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/BPPredWrongE
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/BPPredWrongE
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/CSRWritePendingDEM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/RetM
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/RetM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/TrapM
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/TrapM
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/LoadStallD
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/LoadStallD
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/InstrStall
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/InstrStall
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add wave -noupdate -expand -group HDU -expand -group hazards /testbench/dut/hart/hzu/DataStall
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					add wave -noupdate -expand -group HDU -group hazards /testbench/dut/hart/hzu/DataStall
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
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					add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/hzu/FlushF
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
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					add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushD
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
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					add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushE
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@ -22,41 +22,41 @@ add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbe
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add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW
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					add wave -noupdate -expand -group HDU -expand -group Flush -color Yellow /testbench/dut/hart/FlushW
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
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					add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallF
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add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
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					add wave -noupdate -expand -group HDU -expand -group Stall -color Orange /testbench/dut/hart/StallD
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add wave -noupdate -expand -group Bpred -expand -group direction -divider Update
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					add wave -noupdate -group Bpred -expand -group direction -divider Update
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add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePC
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					add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePC
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add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdateEN
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					add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdateEN
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add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePCIndex
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					add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePCIndex
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add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePrediction
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					add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/UpdatePrediction
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add wave -noupdate -expand -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
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					add wave -noupdate -group Bpred -expand -group direction /testbench/dut/hart/ifu/bpred/DirPredictor/memory/memory
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add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassF
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					add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassF
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add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassD
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					add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassD
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add wave -noupdate -expand -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassE
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					add wave -noupdate -group InstrClass /testbench/dut/hart/ifu/bpred/InstrClassE
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrF
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					add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrF
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD
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					add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrD
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE
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					add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrE
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add wave -noupdate -expand -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM
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					add wave -noupdate -group {instruction pipeline} /testbench/dut/hart/ifu/InstrM
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add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredWrongE
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredWrongE
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCNextF
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNextF
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCF
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCF
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCPlus2or4F
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCPlus2or4F
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredPCF
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredPCF
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext0F
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext0F
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext1F
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PCNext1F
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/SelBPPredF
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/SelBPPredF
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredWrongE
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/BPPredWrongE
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add wave -noupdate -expand -group {PCNext Generation} /testbench/dut/hart/ifu/PrivilegedChangePCM
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					add wave -noupdate -group {PCNext Generation} /testbench/dut/hart/ifu/PrivilegedChangePCM
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add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/ValidBits
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/ValidBits
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add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredF
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/BPPredF
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add wave -noupdate /testbench/dut/hart/ifu/bpred/BTBValidF
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/BTBValidF
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add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPCIndexQ
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPCIndexQ
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add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePCIndexQ
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePCIndexQ
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add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPC
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					add wave -noupdate /testbench/dut/hart/ifu/bpred/TargetPredictor/LookUpPC
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add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE
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					add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/TargetWrongE
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add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE
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					add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/FallThroughWrongE
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add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE
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					add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionDirWrongE
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add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE
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					add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/PredictionPCWrongE
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add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE
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					add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/BPPredWrongE
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add wave -noupdate -expand -group {bp wrong} /testbench/dut/hart/ifu/bpred/InstrClassE
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					add wave -noupdate -group {bp wrong} /testbench/dut/hart/ifu/bpred/InstrClassE
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add wave -noupdate -group BTB -divider Update
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					add wave -noupdate -group BTB -divider Update
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add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateEN
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					add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdateEN
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add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePC
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					add wave -noupdate -group BTB /testbench/dut/hart/ifu/bpred/TargetPredictor/UpdatePC
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@ -77,6 +77,12 @@ add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd1
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd2
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					add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/rd2
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/we3
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					add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/we3
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add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/wd3
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					add wave -noupdate -expand -group RegFile /testbench/dut/hart/ieu/dp/regf/wd3
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					add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ALUResultW
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					add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ReadDataW
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					add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/PCLinkW
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					add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/CSRReadValW
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					add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultSrcW
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					add wave -noupdate -expand -group RegFile -group {write regfile mux} /testbench/dut/hart/ieu/dp/ResultW
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add wave -noupdate /testbench/dut/hart/ieu/c/RegWriteE
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					add wave -noupdate /testbench/dut/hart/ieu/c/RegWriteE
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add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ifu/InstrD
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					add wave -noupdate -group {Decode Stage} /testbench/dut/hart/ifu/InstrD
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add wave -noupdate -group {Decode Stage} /testbench/InstrDName
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					add wave -noupdate -group {Decode Stage} /testbench/InstrDName
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@ -90,11 +96,29 @@ add wave -noupdate -expand -group dcache /testbench/dut/hart/MemPAdrM
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add wave -noupdate -expand -group dcache /testbench/dut/hart/WriteDataM
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					add wave -noupdate -expand -group dcache /testbench/dut/hart/WriteDataM
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add wave -noupdate -expand -group dcache /testbench/dut/hart/ReadDataM
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					add wave -noupdate -expand -group dcache /testbench/dut/hart/ReadDataM
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add wave -noupdate -expand -group dcache /testbench/dut/hart/dmem/MemRWM
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					add wave -noupdate -expand -group dcache /testbench/dut/hart/dmem/MemRWM
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1D
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2D
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs1E
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/Rs2E
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdE
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdM
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RdW
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/MemReadE
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteM
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					add wave -noupdate -group Forward /testbench/dut/hart/ieu/fw/RegWriteW
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					add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardAE
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					add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/ForwardBE
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					add wave -noupdate -group Forward -color Thistle /testbench/dut/hart/ieu/fw/LoadStallD
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					add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/WriteDataE
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					add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/ALUResultE
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					add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcAE
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					add wave -noupdate -expand -group {alu execution stage} /testbench/dut/hart/ieu/dp/SrcBE
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					add wave -noupdate /testbench/dut/hart/ieu/dp/ALUResultM
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TreeUpdate [SetDefaultTree]
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					TreeUpdate [SetDefaultTree]
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WaveRestoreCursors {{Cursor 2} {363960 ns} 0} {{Cursor 3} {365915 ns} 0}
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					WaveRestoreCursors {{Cursor 2} {231033 ns} 0} {{Cursor 3} {1276133 ns} 0}
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quietly wave cursor active 2
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					quietly wave cursor active 2
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configure wave -namecolwidth 250
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					configure wave -namecolwidth 250
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configure wave -valuecolwidth 185
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					configure wave -valuecolwidth 518
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configure wave -justifyvalue left
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					configure wave -justifyvalue left
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configure wave -signalnamewidth 1
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					configure wave -signalnamewidth 1
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configure wave -snapdistance 10
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					configure wave -snapdistance 10
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@ -107,4 +131,4 @@ configure wave -griddelta 40
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configure wave -timeline 0
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					configure wave -timeline 0
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configure wave -timelineunits ns
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					configure wave -timelineunits ns
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update
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					update
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WaveRestoreZoom {365848 ns} {366032 ns}
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					WaveRestoreZoom {1276094 ns} {1276208 ns}
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			|||||||
							
								
								
									
										84
									
								
								wally-pipelined/testbench/function_radix.sv
									
									
									
									
									
										Normal file
									
								
							
							
						
						
									
										84
									
								
								wally-pipelined/testbench/function_radix.sv
									
									
									
									
									
										Normal file
									
								
							@ -0,0 +1,84 @@
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					// Ross Thompson
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					// November 05, 2019
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					// Oklahoma State University
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					module function_radix();
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					   parameter PRELOAD_FILE = "funct_addr.txt";
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					   integer memory_bank [];
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					   integer index;
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					   logic [`XLEN-1:0] pc;
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					   initial begin
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					     $init_signal_spy("/riscv_mram_tb/dut/pc", "/riscv_mram_tb/function_radix/pc");
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					   end
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					   task automatic bin_search_min;
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					      input integer pc;
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					      input integer length;
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					      ref integer   array [];
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					      output integer minval;
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					      integer 	     left, right;
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					      integer 	     mid;
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					      begin
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						 left = 0;
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						 right = length;
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						 while (left <= right) begin
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						    mid = left + ((right - left) / 2);
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						    if (array[mid] == pc) begin
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						       minval = array[mid];
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						       return;
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					            end
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						    if (array[mid] < pc) begin
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						      left = mid + 1;
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						    end else begin
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						      right = mid -1;
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						    end
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						 end // while (left <= right)
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						 // if the element pc is now found, right and left will be equal at this point.
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						 // we need to check if pc is less than the array at left or greather.
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						 // if it is less than pc, then we select left as the index.
 | 
				
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						 // if it is greather we want 1 less than left.
 | 
				
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						 if (array[left] < pc) begin
 | 
				
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						    minval = array[left];
 | 
				
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						    return;	    
 | 
				
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						 end else begin
 | 
				
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						    minval = array[left-1];
 | 
				
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						    return;
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						 end
 | 
				
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					      end
 | 
				
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					   endtask
 | 
				
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 | 
				
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 | 
				
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					   // preload
 | 
				
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					   initial $readmemh(PRELOAD_FILE, memory_bank);
 | 
				
			||||||
 | 
					
 | 
				
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					   // we need to count the number of lines in the file so we can set line_count.
 | 
				
			||||||
 | 
					   integer fp;
 | 
				
			||||||
 | 
					   integer line_count = 0;
 | 
				
			||||||
 | 
					   logic [31:0] line;
 | 
				
			||||||
 | 
					   initial begin
 | 
				
			||||||
 | 
					      fp = $fopen(PRELOAD_FILE, "r");
 | 
				
			||||||
 | 
					      // read line by line to count lines
 | 
				
			||||||
 | 
					      if (fp) begin
 | 
				
			||||||
 | 
						 while (! $feof(fp)) begin
 | 
				
			||||||
 | 
						    $fscanf(fp, "%h\n", line);
 | 
				
			||||||
 | 
						    line_count = line_count + 1;
 | 
				
			||||||
 | 
						 end
 | 
				
			||||||
 | 
					      end else begin
 | 
				
			||||||
 | 
						 $display("Cannot open file %s for reading.", PRELOAD_FILE);
 | 
				
			||||||
 | 
						 $stop;
 | 
				
			||||||
 | 
					      end
 | 
				
			||||||
 | 
					   end
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					   always @(pc) begin
 | 
				
			||||||
 | 
					      bin_search_min(pc, line_count, memory_bank, index);
 | 
				
			||||||
 | 
					      
 | 
				
			||||||
 | 
					   end
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					endmodule // function_radix
 | 
				
			||||||
 | 
					
 | 
				
			||||||
@ -405,7 +405,11 @@ string tests32i[] = {
 | 
				
			|||||||
          reset = 1; # 17; reset = 0;
 | 
					          reset = 1; # 17; reset = 0;
 | 
				
			||||||
        end
 | 
					        end
 | 
				
			||||||
      end
 | 
					      end
 | 
				
			||||||
    end
 | 
					    end // always @ (negedge clk)
 | 
				
			||||||
 | 
					
 | 
				
			||||||
 | 
					  // track the current function or label
 | 
				
			||||||
 | 
					  function_rfunction_radix function_radix();
 | 
				
			||||||
 | 
					  
 | 
				
			||||||
endmodule
 | 
					endmodule
 | 
				
			||||||
 | 
					
 | 
				
			||||||
/* verilator lint_on STMTDLY */
 | 
					/* verilator lint_on STMTDLY */
 | 
				
			||||||
 | 
				
			|||||||
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