diff --git a/fpga/generator/Makefile b/fpga/generator/Makefile
index 64d2f20d4..f481e2c81 100644
--- a/fpga/generator/Makefile
+++ b/fpga/generator/Makefile
@@ -24,7 +24,7 @@ all: FPGA_Arty
 FPGA_Arty: PreProcessFiles IP_Arty
 	vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log
 
-FPGA_VCU: PreProcessFiles IP_VCU SDC
+FPGA_VCU: PreProcessFiles IP_VCU
 	vivado -mode tcl -source wally.tcl 2>&1 | tee wally.log
 
 IP_VCU: $(dst)/xlnx_proc_sys_reset.log \
diff --git a/fpga/src/fpgaTop.v b/fpga/src/fpgaTop.v
index dc10b9e6b..43cbb1a8b 100644
--- a/fpga/src/fpgaTop.v
+++ b/fpga/src/fpgaTop.v
@@ -421,8 +421,8 @@ module fpgaTop
   wire  [3:0] sd_dat_reg_o;
   wire        sd_dat_reg_t;
   
-  assign GPIOPinsIn = {28'b0, GPI};
-  assign GPO = GPIOPinsOut[4:0];
+  assign GPIOIN = {28'b0, GPI};
+  assign GPO = GPIOOUT[4:0];
   assign ahblite_resetn = peripheral_aresetn;
   assign cpu_reset = bus_struct_reset;
   assign calib = c0_init_calib_complete;