Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-03 02:05:21 +00:00
Code Issues Packages Projects Releases Wiki Activity

Closer to verilator support.

Browse Source
This commit is contained in:
Rose Thompson 2023-12-18 16:26:56 -06:00
parent 58942b246b
commit c1ac153a4f
3 changed files with 23 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
testbench/common/DCacheFlushFSM.sv
View File

@ -97,7 +97,10 @@ module DCacheFlushFSM import cvw::*; #(parameter cvw_t P)
// # ** Error: ../testbench/testbench.sv(483): Range must be bounded by constant expressions. // # ** Error: ../testbench/testbench.sv(483): Range must be bounded by constant expressions.
// see https://verificationacademy.com/forums/systemverilog/range-must-be-bounded-constant-expressions // see https://verificationacademy.com/forums/systemverilog/range-must-be-bounded-constant-expressions
//ShadowRAM[CacheAdr[j][i][k] >> $clog2(P.XLEN/8)] = cacheline[P.XLEN*(k+1)-1:P.XLEN*k]; //ShadowRAM[CacheAdr[j][i][k] >> $clog2(P.XLEN/8)] = cacheline[P.XLEN*(k+1)-1:P.XLEN*k];
ShadowRAM[(CacheAdr[j][i][l] >> $clog2(P.XLEN/8)) + k] = CacheData[j][i][l][P.XLEN*k +: P.XLEN]; /* verilator lint_off WIDTHTRUNC */
// *** lint error: address trunc warning for shadowram index
ShadowRAM[(CacheAdr[j][i][l] >> $clog2(P.XLEN/8)) + {{{P.PA_BITS-32}{1'b0}}, k}] = CacheData[j][i][l][P.XLEN*k +: P.XLEN];
/* verilator lint_on WIDTHTRUNC */
end end
end end
end end

21
testbench/common/functionName.sv
View File

@ -30,7 +30,7 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
input string ProgramLabelMapFile input string ProgramLabelMapFile
); );
logic [P.XLEN-1:0] ProgramAddrMapMemory []; logic [P.XLEN-1:0] ProgramAddrMapMemory [longint];
string ProgramLabelMapMemory [integer]; string ProgramLabelMapMemory [integer];
string FunctionName; string FunctionName;
@ -62,7 +62,7 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
task automatic bin_search_min; task automatic bin_search_min;
input logic [P.XLEN-1:0] pc; input logic [P.XLEN-1:0] pc;
input logic [P.XLEN-1:0] length; input logic [P.XLEN-1:0] length;
ref logic [P.XLEN-1:0] array []; ref logic [P.XLEN-1:0] array [longint];
output logic [P.XLEN-1:0] minval; output logic [P.XLEN-1:0] minval;
output logic [P.XLEN-1:0] mid; output logic [P.XLEN-1:0] mid;
@ -109,7 +109,8 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
endtask // bin_search_min endtask // bin_search_min
integer ProgramAddrMapFP, ProgramLabelMapFP; integer ProgramAddrMapFP, ProgramLabelMapFP;
integer ProgramAddrMapLineCount, ProgramLabelMapLineCount; longint ProgramAddrMapLineCount;
integer ProgramLabelMapLineCount;
longint ProgramAddrMapLine; longint ProgramAddrMapLine;
string ProgramLabelMapLine; string ProgramLabelMapLine;
integer status; integer status;
@ -118,11 +119,17 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
// preload // preload
// initial begin // initial begin
always @ (negedge reset) begin always @ (negedge reset) begin
// cannot readmemh directoy to a dynmaic array. Sad times :(
// Let's initialize a static array with FFFF_FFFF for all addresses.
// Then we can readmemh and finally copy to the dynamic array.
// clear out the old mapping between programs. // clear out the old mapping between programs.
ProgramAddrMapMemory.delete(); ProgramAddrMapMemory.delete();
ProgramLabelMapMemory.delete(); ProgramLabelMapMemory.delete();
$readmemh(ProgramAddrMapFile, ProgramAddrMapMemory); // Unfortunately verilator version 5.011 readmemh does not support dynamic arrays
//$readmemh(ProgramAddrMapFile, ProgramAddrMapMemory);
// we need to count the number of lines in the file so we can set FunctionRadixLineCount. // we need to count the number of lines in the file so we can set FunctionRadixLineCount.
ProgramAddrMapLineCount = 0; ProgramAddrMapLineCount = 0;
@ -131,9 +138,9 @@ module FunctionName import cvw::*; #(parameter cvw_t P) (
// read line by line to count lines // read line by line to count lines
if (ProgramAddrMapFP) begin if (ProgramAddrMapFP) begin
while (! $feof(ProgramAddrMapFP)) begin while (! $feof(ProgramAddrMapFP)) begin
status = $fscanf(ProgramAddrMapFP, "%h\n", ProgramAddrMapLine); status = $fscanf(ProgramAddrMapFP, "%h\n", ProgramAddrMapLine);
ProgramAddrMapMemory[ProgramAddrMapLineCount] = ProgramAddrMapLine;
ProgramAddrMapLineCount = ProgramAddrMapLineCount + 1; ProgramAddrMapLineCount = ProgramAddrMapLineCount + 1;
end end
end else begin end else begin
$display("Cannot open file %s for reading.", ProgramAddrMapFile); $display("Cannot open file %s for reading.", ProgramAddrMapFile);

7
testbench/testbench.sv
View File

@ -563,8 +563,11 @@ module testbench;
/* verilator lint_off INFINITELOOP */ /* verilator lint_off INFINITELOOP */
while (signature[i] !== 'bx) begin while (signature[i] !== 'bx) begin
logic [P.XLEN-1:0] sig; logic [P.XLEN-1:0] sig;
if (P.DTIM_SUPPORTED) sig = testbench.dut.core.lsu.dtim.dtim.ram.RAM[testadrNoBase+i]; // **************************************
else if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncore.uncore.ram.ram.memory.RAM[testadrNoBase+i]; // ***** BUG BUG BUG make sure RT undoes this.
//if (P.DTIM_SUPPORTED) sig = testbench.dut.core.lsu.dtim.dtim.ram.RAM[testadrNoBase+i];
//else if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncore.uncore.ram.ram.memory.RAM[testadrNoBase+i];
if (P.UNCORE_RAM_SUPPORTED) sig = testbench.dut.uncore.uncore.ram.ram.memory.RAM[testadrNoBase+i];
//$display("signature[%h] = %h sig = %h", i, signature[i], sig); //$display("signature[%h] = %h sig = %h", i, signature[i], sig);
if (signature[i] !== sig & (signature[i] !== testbench.DCacheFlushFSM.ShadowRAM[testadr+i])) begin if (signature[i] !== sig & (signature[i] !== testbench.DCacheFlushFSM.ShadowRAM[testadr+i])) begin
errors = errors+1; errors = errors+1;