diff --git a/wally-pipelined/src/fpu/booth.sv b/wally-pipelined/src/fpu/booth.sv index 03511ff63..df6c1c238 100644 --- a/wally-pipelined/src/fpu/booth.sv +++ b/wally-pipelined/src/fpu/booth.sv @@ -22,7 +22,10 @@ module booth(xExt, choose, add1, e, pp); 3'b100 : pp = {negx, 1'b0}; // -2 3'b101 : pp = {1'b1, negx}; // -1 3'b110 : pp = {1'b1, negx}; // -1 - 3'b111 : pp = 55'hfffffffffffffff; // -0 + // *** <Thomas Fleming> I changed this to fix a lint error. '1 should + // fill the signal with all ones. + // 3'b111 : pp = 55'hfffffffffffffff; + 3'b111 : pp = '1; // -0 endcase always_comb diff --git a/wally-pipelined/src/muldiv/div.sv b/wally-pipelined/src/muldiv/div.sv index 05c9793a2..a8ac196cf 100755 --- a/wally-pipelined/src/muldiv/div.sv +++ b/wally-pipelined/src/muldiv/div.sv @@ -23,6 +23,13 @@ // OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. /////////////////////////////////////////// +// *** <Thomas Fleming> I added these verilator controls to clean up the +// lint output. The linter warnings should be fixed, but now the output is at +// least readable. +/* verilator lint_off COMBDLY */ +/* verilator lint_off IMPLICIT */ + + module div (Q, rem0, done, divBusy, div0, N, D, clk, reset, start); input logic [63:0] N, D; @@ -1554,3 +1561,5 @@ module shifter_r32 (Z, A, Shift); endmodule // shifter_r32 +/* verilator lint_on COMBDLY */ +/* verilator lint_on IMPLICIT */