mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-11 06:05:49 +00:00
AES simplification
This commit is contained in:
parent
b4a914a6e3
commit
c01e4495b1
@ -89,7 +89,11 @@ for test in tests64i:
|
||||
configs.append(tc)
|
||||
|
||||
tests32gcimperas = ["imperas32i", "imperas32f", "imperas32m", "imperas32c"] # unused
|
||||
tests32gc = ["arch32f", "arch32d", "arch32f_fma", "arch32d_fma", "arch32f_divsqrt", "arch32d_divsqrt", "arch32i", "arch32priv", "arch32c", "arch32m", "arch32a", "arch32zifencei", "arch32zicond", "arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "arch32zfh", "arch32zfh_fma", "arch32zfh_divsqrt", "arch32zfaf", "wally32a", "wally32priv", "wally32periph", "arch32zbkb", "arch32zbkc", "arch32zbkx", "arch32zknd", "arch32zkne", "arch32zknh"] # "arch32zbc", "arch32zfad",
|
||||
tests32gc = ["arch32f", "arch32d", "arch32f_fma", "arch32d_fma", "arch32f_divsqrt", "arch32d_divsqrt",
|
||||
"arch32i", "arch32priv", "arch32c", "arch32m", "arch32a", "arch32zifencei", "arch32zicond",
|
||||
"arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "arch32zfh", "arch32zfh_fma",
|
||||
"arch32zfh_divsqrt", "arch32zfaf", "wally32a", "wally32priv", "wally32periph",
|
||||
"arch32zbkb", "arch32zbkc", "arch32zbkx", "arch32zknd", "arch32zkne", "arch32zknh"] # "arch32zbc", "arch32zfad",
|
||||
#tests32gc = ["arch32f", "arch32d", "arch32f_fma", "arch32d_fma", "arch32i", "arch32priv", "arch32c", "arch32m", "arch32a", "arch32zifencei", "arch32zba", "arch32zbb", "arch32zbc", "arch32zbs", "arch32zicboz", "arch32zcb", "wally32a", "wally32priv", "wally32periph"]
|
||||
for test in tests32gc:
|
||||
tc = TestCase(
|
||||
|
@ -38,9 +38,8 @@ module aes64d(
|
||||
// Apply inverse shiftrows to rs2 and rs1
|
||||
aesinvshiftrow srow({rs2, rs1}, ShiftRowOut);
|
||||
|
||||
// Apply full word inverse substitution to lower 2 words of shiftrow out
|
||||
aesinvsboxword invsbox0(ShiftRowOut[31:0], SboxOut[31:0]);
|
||||
aesinvsboxword invsbox1(ShiftRowOut[63:32], SboxOut[63:32]);
|
||||
// Apply full word inverse substitution to lower doubleord of shiftrow out
|
||||
aesinvsbox64 invsbox(ShiftRowOut[63:0], SboxOut);
|
||||
|
||||
mux2 #(64) mixcolmux(SboxOut, rs1, aes64im, MixcolIn);
|
||||
|
||||
|
@ -45,7 +45,7 @@ module aes64e(
|
||||
assign SboxEIn = ShiftRowOut[31:0];
|
||||
assign SboxOut[31:0] = Sbox0Out;
|
||||
|
||||
aessboxword sbox1(ShiftRowOut[63:32], SboxOut[63:32]); // instantiate second sbox
|
||||
aessbox32 sbox1(ShiftRowOut[63:32], SboxOut[63:32]); // instantiate second sbox
|
||||
|
||||
// Apply mix columns operations
|
||||
aesmixcolumns mw0(SboxOut[31:0], MixcolOut[31:0]);
|
||||
|
@ -1,5 +1,5 @@
|
||||
///////////////////////////////////////////
|
||||
// aesinvsboxword.sv
|
||||
// aesinvsbox64.sv
|
||||
//
|
||||
// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
|
||||
// Created: 20 February 2024
|
||||
@ -25,14 +25,18 @@
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
module aesinvsboxword(
|
||||
input logic [31:0] a,
|
||||
output logic [31:0] y
|
||||
module aesinvsbox64(
|
||||
input logic [63:0] a,
|
||||
output logic [63:0] y
|
||||
);
|
||||
|
||||
// inverse substitutions boxes for each byte of the word
|
||||
aesinvsbox sboxb0(a[7:0], y[7:0]);
|
||||
aesinvsbox sboxb1(a[15:8], y[15:8]);
|
||||
aesinvsbox sboxb2(a[23:16], y[23:16]);
|
||||
aesinvsbox sboxb3(a[31:24], y[31:24]);
|
||||
// inverse substitutions boxes for each byte of the 32-bit word
|
||||
aesinvsbox sbox0(a[7:0], y[7:0]);
|
||||
aesinvsbox sbox1(a[15:8], y[15:8]);
|
||||
aesinvsbox sbox2(a[23:16], y[23:16]);
|
||||
aesinvsbox sbox3(a[31:24], y[31:24]);
|
||||
aesinvsbox sbox4(a[39:32], y[39:32]);
|
||||
aesinvsbox sbox5(a[47:40], y[47:40]);
|
||||
aesinvsbox sbox6(a[55:48], y[55:48]);
|
||||
aesinvsbox sbox7(a[63:56], y[63:56]);
|
||||
endmodule
|
@ -1,5 +1,5 @@
|
||||
///////////////////////////////////////////
|
||||
// aessboxword.sv
|
||||
// aessbox32.sv
|
||||
//
|
||||
// Written: ryan.swann@okstate.edu, james.stine@okstate.edu
|
||||
// Created: 20 February 2024
|
||||
@ -25,14 +25,14 @@
|
||||
// and limitations under the License.
|
||||
////////////////////////////////////////////////////////////////////////////////////////////////
|
||||
|
||||
module aessboxword(
|
||||
module aessbox32(
|
||||
input logic [31:0] a,
|
||||
output logic [31:0] y
|
||||
);
|
||||
|
||||
// substitutions boxes for each byte of the word
|
||||
aessbox sboxb0(a[7:0], y[7:0]);
|
||||
aessbox sboxb1(a[15:8], y[15:8]);
|
||||
aessbox sboxb2(a[23:16], y[23:16]);
|
||||
aessbox sboxb3(a[31:24], y[31:24]);
|
||||
// substitutions boxes for each byte of the 32-bit word
|
||||
aessbox sbox0(a[7:0], y[7:0]);
|
||||
aessbox sbox1(a[15:8], y[15:8]);
|
||||
aessbox sbox2(a[23:16], y[23:16]);
|
||||
aessbox sbox3(a[31:24], y[31:24]);
|
||||
endmodule
|
@ -44,7 +44,7 @@ module zknde64 import cvw::*; #(parameter cvw_t P) (
|
||||
|
||||
// One S Box is always needed for aes64ks1i and is also needed for aes64e if that is supported. Put it at the top level to allow sharing
|
||||
mux2 #(32) sboxmux(SboxEIn, SboxKIn, ZKNSelect[1], Sbox0In);
|
||||
aessboxword sbox(Sbox0In, Sbox0Out); // Substitute bytes of value obtained for tmp2 using Rijndael sbox
|
||||
aessbox32 sbox(Sbox0In, Sbox0Out); // Substitute bytes of value obtained for tmp2 using Rijndael sbox
|
||||
|
||||
// Both ZKND and ZKNE support aes64ks1i and aes64ks2 instructions
|
||||
aes64ks1i aes64ks1i(.round, .rs1(A), .Sbox0Out, .SboxKIn, .result(aes64ks1iRes));
|
||||
|
Loading…
Reference in New Issue
Block a user