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https://github.com/openhwgroup/cvw
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Merge pull request #388 from davidharrishmc/dev
minor touchups, including legal SATP
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commit
bac6779af4
@ -88,8 +88,12 @@ module csrs import cvw::*; #(parameter cvw_t P) (
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assign WriteSEPCM = STrapM | (CSRSWriteM & (CSRAdrM == SEPC));
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assign WriteSCAUSEM = STrapM | (CSRSWriteM & (CSRAdrM == SCAUSE));
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assign WriteSTVALM = STrapM | (CSRSWriteM & (CSRAdrM == STVAL));
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if(P.XLEN == 64) assign WriteSATPM = CSRSWriteM & (CSRAdrM == SATP) & (PrivilegeModeW == P.M_MODE | ~STATUS_TVM) & (CSRWriteValM[63:60] != 4'hA);
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else assign WriteSATPM = CSRSWriteM & (CSRAdrM == SATP) & (PrivilegeModeW == P.M_MODE | ~STATUS_TVM);
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if(P.XLEN == 64) begin
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logic LegalSatpModeM;
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assign LegalSatpModeM = P.VIRTMEM_SUPPORTED & (CSRWriteValM[63:60] == 0 | CSRWriteValM[63:60] == 8 | CSRWriteValM[63:60] == 9); // supports SV39 and 48
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assign WriteSATPM = CSRSWriteM & (CSRAdrM == SATP) & (PrivilegeModeW == P.M_MODE | ~STATUS_TVM) & LegalSatpModeM;
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end else // RV32
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assign WriteSATPM = CSRSWriteM & (CSRAdrM == SATP) & (PrivilegeModeW == P.M_MODE | ~STATUS_TVM) & P.VIRTMEM_SUPPORTED;
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assign WriteSCOUNTERENM = CSRSWriteM & (CSRAdrM == SCOUNTEREN);
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assign WriteSENVCFGM = CSRSWriteM & (CSRAdrM == SENVCFG);
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assign WriteSTIMECMPM = CSRSWriteM & (CSRAdrM == STIMECMP) & STCE;
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@ -94,10 +94,10 @@ endif
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ifneq ($(MOD), orig)
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# PMP 0
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sed -i 's/PMP_ENTRIES \(64\|16\|0\)/PMP_ENTRIES 0/' $(CONFIGDIR)/config.vh
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sed -i 's/PMP_ENTRIES \(64\|16\|0\)/PMP_ENTRIES = 0;/' $(CONFIGDIR)/config.vh
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ifneq ($(MOD), PMP0)
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# no priv
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sed -i 's/ZICSR_SUPPORTED *1/ZICSR_SUPPORTED 0/' $(CONFIGDIR)/config.vh
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sed -i 's/ZICSR_SUPPORTED *1/ZICSR_SUPPORTED = 0;/' $(CONFIGDIR)/config.vh
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ifneq ($(MOD), noPriv)
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# turn off FPU
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sed -i 's/1 *<< *3/0 << 3/' $(CONFIGDIR)/config.vh
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@ -128,7 +128,7 @@ mkdirecs:
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@mkdir -p $(OUTPUTDIR)/mapped
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@mkdir -p $(OUTPUTDIR)/unmapped
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synth: mkdirecs configs rundc clean
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synth: mkdirecs configs rundc # clean
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rundc:
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ifeq ($(TECH), tsmc28psyn)
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@ -25,7 +25,9 @@ set maxopt $::env(MAXOPT)
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set drive $::env(DRIVE)
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eval file copy -force [glob ${cfg}/*.vh] {$outputDir/hdl/}
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eval file copy -force [glob ${hdl_src}/*.sv] {$outputDir/hdl/}
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eval file copy -force [glob ${cfg}/*.vh] {$outputDir/hdl/}
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eval file copy -force [glob ${hdl_src}/cvw.sv] {$outputDir/hdl/}
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eval file copy -force [glob ${hdl_src}/../fpga/src/wallypipelinedsocwrapper.sv] {$outputDir/hdl/}
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eval file copy -force [glob ${hdl_src}/*/*.sv] {$outputDir/hdl/}
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eval file copy -force [glob ${hdl_src}/*/*/*.sv] {$outputDir/hdl/}
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@ -74,7 +76,7 @@ if { [shell_is_in_topographical_mode] } {
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#set alib_library_analysis_path ./$outputDir
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define_design_lib WORK -path ./$outputDir/WORK
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analyze -f sverilog -lib WORK $my_verilog_files
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elaborate $my_toplevel -lib WORK
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elaborate $my_toplevel -parameter P -lib WORK
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# Set the current_design
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current_design $my_toplevel
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