From b982db5bd5978dc7675f3dff72038531b4de78ac Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 25 Aug 2022 18:12:09 -0700 Subject: [PATCH] Removed STATE_BUS_FETCH and STATE_BUS_WRITE --- pipelined/src/lsu/busfsm.sv | 14 +++++--------- 1 file changed, 5 insertions(+), 9 deletions(-) diff --git a/pipelined/src/lsu/busfsm.sv b/pipelined/src/lsu/busfsm.sv index ff91707b6..2e9842231 100644 --- a/pipelined/src/lsu/busfsm.sv +++ b/pipelined/src/lsu/busfsm.sv @@ -62,8 +62,6 @@ module busfsm #(parameter integer LOGWPL, parameter logic CACHE_ENABLED ) typedef enum logic [2:0] {STATE_BUS_READY, - STATE_BUS_FETCH, - STATE_BUS_WRITE, STATE_BUS_UNCACHED_WRITE, STATE_BUS_UNCACHED_WRITE_DONE, STATE_BUS_UNCACHED_READ, @@ -114,21 +112,19 @@ module busfsm #(parameter integer LOGWPL, parameter logic CACHE_ENABLED ) (BusCurrState == STATE_BUS_UNCACHED_READ); assign UnCachedBusWrite = (BusCurrState == STATE_BUS_READY & UnCachedAccess & RW[0] & ~IgnoreRequest) | (BusCurrState == STATE_BUS_UNCACHED_WRITE); - assign BusWrite = UnCachedBusWrite | (BusCurrState == STATE_BUS_WRITE & ~WordCountFlag); + assign BusWrite = UnCachedBusWrite; assign SelBusWord = (BusCurrState == STATE_BUS_READY & UnCachedAccess & RW[0]) | - (BusCurrState == STATE_BUS_UNCACHED_WRITE) | - (BusCurrState == STATE_BUS_WRITE); + (BusCurrState == STATE_BUS_UNCACHED_WRITE); assign UnCachedBusRead = (BusCurrState == STATE_BUS_READY & UnCachedAccess & RW[1] & ~IgnoreRequest) | (BusCurrState == STATE_BUS_UNCACHED_READ); - assign BusRead = UnCachedBusRead | (BusCurrState == STATE_BUS_FETCH & ~(WordCountFlag)); - assign BufferCaptureEn = UnCachedBusRead | BusCurrState == STATE_BUS_FETCH; + assign BusRead = UnCachedBusRead; + assign BufferCaptureEn = UnCachedBusRead; // Makes bus only do uncached reads/writes when we actually do uncached reads/writes. Needed because Cacheable is 0 when flushing cache. assign UnCachedRW = UnCachedBusWrite | UnCachedBusRead; - assign CacheBusAck = (BusCurrState == STATE_BUS_FETCH & WordCountFlag & BusAck) | - (BusCurrState == STATE_BUS_WRITE & WordCountFlag & BusAck); + assign CacheBusAck = 0; assign BusCommitted = BusCurrState != STATE_BUS_READY; assign SelUncachedAdr = (BusCurrState == STATE_BUS_READY & (|RW & UnCachedAccess)) | (BusCurrState == STATE_BUS_UNCACHED_READ |