From b77df83b597f141ca800322675c2b9956d53937c Mon Sep 17 00:00:00 2001 From: Huda-10xe Date: Mon, 7 Oct 2024 03:52:36 -0700 Subject: [PATCH] Adding DUT signals to the tracer for VM Coverage --- testbench/common/wallyTracer.sv | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/testbench/common/wallyTracer.sv b/testbench/common/wallyTracer.sv index d6ba31083..83eeacf5f 100644 --- a/testbench/common/wallyTracer.sv +++ b/testbench/common/wallyTracer.sv @@ -80,7 +80,6 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi); assign InstrValidE = testbench.dut.core.ieu.c.InstrValidE; assign InstrValidM = testbench.dut.core.ieu.InstrValidM; assign InstrRawD = testbench.dut.core.ifu.InstrRawD; - assign PPN_dM = testbench.dut.core.lsu.dmmu.dmmu.tlb.tlb.PPN; assign PCNextF = testbench.dut.core.ifu.PCNextF; assign PCF = testbench.dut.core.ifu.PCF; assign PCD = testbench.dut.core.ifu.PCD; @@ -115,6 +114,8 @@ module wallyTracer import cvw::*; #(parameter cvw_t P) (rvviTrace rvvi); assign PTE_iM = testbench.dut.core.ifu.immu.immu.PTE; assign PTE_dM = testbench.dut.core.lsu.dmmu.dmmu.PTE; assign PPN_iM = testbench.dut.core.ifu.immu.immu.tlb.tlb.PPN; + assign PPN_dM = testbench.dut.core.lsu.dmmu.dmmu.tlb.tlb.PPN; + logic valid;