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Merge pull request #1104 from davidharrishmc/dev

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Privileged functional coverage tests run in regression-wally --fcov
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Jordan Carlin 2024-11-16 10:27:12 -08:00 committed by GitHub
commit b6b1fc82ab
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2 changed files with 6 additions and 3 deletions
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7
bin/regression-wally
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@ -301,7 +301,8 @@ def addLockstepTestsByDir(dir, config, sim, fcovMode):
for dirpath, dirnames, filenames in os.walk(os.path.abspath(dir)): for dirpath, dirnames, filenames in os.walk(os.path.abspath(dir)):
for file in filenames: for file in filenames:
# fcov lockstep only runs on WALLY-COV-ALL.elf files; other lockstep runs on all files # fcov lockstep only runs on WALLY-COV-ALL.elf files; other lockstep runs on all files
if (file.endswith(".elf") and fcovMode == 0 or file.endswith("ALL.elf") and fcovMode == 1): if ((file.endswith(".elf") and (fcovMode == 0 or "tests/priv" in dir)) or
(file.endswith("ALL.elf") and fcovMode == 1)):
fullfile = os.path.join(dirpath, file) fullfile = os.path.join(dirpath, file)
fields = fullfile.rsplit('/', 3) fields = fullfile.rsplit('/', 3)
if (fields[2] == "ref"): if (fields[2] == "ref"):
@ -419,9 +420,11 @@ if (args.ccov): # only run RV64GC tests on Questa in code coverage mode
addTests(tests64gc_nofp, coveragesim) addTests(tests64gc_nofp, coveragesim)
if (args.fp): if (args.fp):
addTests(tests64gc_fp, coveragesim) addTests(tests64gc_fp, coveragesim)
elif (args.fcov): # only run RV64GC tests on Questa in lockstep in functional coverage mode elif (args.fcov): # run tests in lockstep in functional coverage mode
addLockstepTestsByDir(WALLY+"/addins/cvw-arch-verif/tests/rv32/", "rv32gc", coveragesim, 1) addLockstepTestsByDir(WALLY+"/addins/cvw-arch-verif/tests/rv32/", "rv32gc", coveragesim, 1)
addLockstepTestsByDir(WALLY+"/addins/cvw-arch-verif/tests/rv64/", "rv64gc", coveragesim, 1) addLockstepTestsByDir(WALLY+"/addins/cvw-arch-verif/tests/rv64/", "rv64gc", coveragesim, 1)
addLockstepTestsByDir(WALLY+"/addins/cvw-arch-verif/tests/priv/rv32/", "rv32gc", coveragesim, 1)
addLockstepTestsByDir(WALLY+"/addins/cvw-arch-verif/tests/priv/rv64/", "rv64gc", coveragesim, 1)
#addLockstepTestsByDir(WALLY+"/tests/riscof/work/wally-riscv-arch-test/rv64i_m/privilege/src/", "rv64gc", coveragesim, 0) #addLockstepTestsByDir(WALLY+"/tests/riscof/work/wally-riscv-arch-test/rv64i_m/privilege/src/", "rv64gc", coveragesim, 0)
else: else:

2
src/uncore/clint_apb.sv
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@ -115,7 +115,7 @@ module clint_apb import cvw::*; #(parameter cvw_t P) (
always_ff @(posedge PCLK) always_ff @(posedge PCLK)
if (~PRESETn) begin if (~PRESETn) begin
MSIP <= 1'b0; MSIP <= 1'b0;
MTIMECMP <= '0; MTIMECMP <= 64'hFFFFFFFFFFFFFFFF; // Spec says MTIMECMP is not reset, but we reset to maximum value to prevent spurious timer interrupts
end else if (memwrite) begin end else if (memwrite) begin
if (entry == 16'h0000) MSIP <= PWDATA[0]; if (entry == 16'h0000) MSIP <= PWDATA[0];
if (entry == 16'h4000) if (entry == 16'h4000)