From b4cfdf3393c50796fac63ad9ad86fc6727d3d373 Mon Sep 17 00:00:00 2001 From: harshinisrinath Date: Sun, 30 Jul 2023 16:40:06 -0700 Subject: [PATCH] Fixed bug and tried to reset menvcfg to improve testing of csri in priv. --- tests/coverage/priv.S | 30 ++++++++++++++++++++++++++---- 1 file changed, 26 insertions(+), 4 deletions(-) diff --git a/tests/coverage/priv.S b/tests/coverage/priv.S index 4be1d4091..f728a007e 100644 --- a/tests/coverage/priv.S +++ b/tests/coverage/priv.S @@ -56,16 +56,38 @@ sretdone: csrw satp, zero # STIMECMP from S mode - li t0, 1 + # 1st is when MENVCFG_STCE is cleared + li a0, 3 + ecall # starts in M-mode + csrw menvcfg, x0 + li a0, 1 ecall # enter S-mode csrw stimecmp, zero - li t0, 3 + li a0, 3 ecall # return to M-mode csrsi mcounteren, 2 # mcounteren_tm = 1 - li t0, 1 + li a0, 1 ecall # supervisor mode again csrw stimecmp, zero - li t0, 3 + li a0, 3 + ecall # machine mode again + + # STIMECMP from S mode + # 2nd is when MENVCFG_STCE is set + csrci mcounteren, 2 # mcounteren_tm = 0 + li t0, 1 + slli t0, t0, 63 + csrw menvcfg, t0 + li a0, 1 + ecall # enter S-mode + csrw stimecmp, zero + li a0, 3 + ecall # return to M-mode + csrsi mcounteren, 2 # mcounteren_tm = 1 + li a0, 1 + ecall # supervisor mode again + csrw stimecmp, zero + li a0, 3 ecall # machine mode again