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https://github.com/openhwgroup/cvw
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added license info and formatting
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module fetchbuffer
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///////////////////////////////////////////
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import cvw::*;
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// fetchbuffer.sv
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#(
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//
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parameter cvw_t P
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// Written: chickson@hmc.edu ; vkrishna@hmc.edu
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) (
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// Created: 30 September 2024
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// Modified: 3 October 2024
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//
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// Purpose: Store multiple instructions in a cyclic FIFO
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//
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// A component of the CORE-V-WALLY configurable RISC-V project.
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// https://github.com/openhwgroup/cvw
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//
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// Copyright (C) 2021-24 Harvey Mudd College & Oklahoma State University
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//
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// SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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//
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// Licensed under the Solderpad Hardware License v 2.1 (the “License”); you may not use this file
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// except in compliance with the License, or, at your option, the Apache License version 2.0. You
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// may obtain a copy of the License at
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//
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// https://solderpad.org/licenses/SHL-2.1/
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//
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// Unless required by applicable law or agreed to in writing, any work distributed under the
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// License is distributed on an “AS IS” BASIS, WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND,
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// either express or implied. See the License for the specific language governing permissions
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// and limitations under the License.
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////////////////////////////////////////////////////////////////////////////////////////////////
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module fetchbuffer import cvw::*; #(parameter cvw_t P) (
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input logic clk, reset,
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input logic clk, reset,
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input logic StallD, flush,
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input logic StallD, flush,
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input logic [31:0] writeData,
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input logic [31:0] writeData,
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