CacheEn enables reading or writing the cache memory arrays. This is only disabled if we have a stall while in the ready state and we don't have a cache miss. This is a cache hit, but we are stalled.

This commit is contained in:
Ross Thompson 2022-12-21 22:13:05 -06:00
parent e441f90b32
commit b3ff4fe02e

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@ -185,6 +185,6 @@ module cachefsm
resetDelay; resetDelay;
assign SelFetchBuffer = CurrState == STATE_WRITE_LINE | CurrState == STATE_READ_HOLD; assign SelFetchBuffer = CurrState == STATE_WRITE_LINE | CurrState == STATE_READ_HOLD;
assign CacheEn = (CurrState == STATE_READY & ~Stall | CacheStall) | (CurrState != STATE_READY) | reset; assign CacheEn = (CurrState == STATE_READY & (~Stall | FlushCache | AnyMiss)) | (CurrState != STATE_READY) | reset;
endmodule // cachefsm endmodule // cachefsm