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Disabled old SD card and attached IOBUF's to new SD peripheral.

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This commit is contained in:
Jacob Pease 2023-02-28 12:20:46 -06:00
parent 2822cb273c
commit b2a5786cda
2 changed files with 34 additions and 15 deletions
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2
config/fpga/wally-config.vh
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@ -117,7 +117,7 @@
`define PLIC_SUPPORTED 1'b1 `define PLIC_SUPPORTED 1'b1
`define PLIC_BASE 56'h0C000000 `define PLIC_BASE 56'h0C000000
`define PLIC_RANGE 56'h03FFFFFF `define PLIC_RANGE 56'h03FFFFFF
`define SDC_SUPPORTED 1'b1 `define SDC_SUPPORTED 1'b0
`define SDC_BASE 56'h00012100 `define SDC_BASE 56'h00012100
`define SDC_RANGE 56'h0000001F `define SDC_RANGE 56'h0000001F

47
fpga/src/fpgaTop.v
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@ -90,9 +90,10 @@ module fpgaTop
wire [31:0] GPIOPinsIn, GPIOPinsOut, GPIOPinsEn; wire [31:0] GPIOPinsIn, GPIOPinsOut, GPIOPinsEn;
wire SDCCmdIn; // Old SDC connections
wire SDCCmdOE; // wire SDCCmdIn;
wire SDCCmdOut; // wire SDCCmdOE;
// wire SDCCmdOut;
(* mark_debug = "true" *) wire [3:0] m_axi_awid; (* mark_debug = "true" *) wire [3:0] m_axi_awid;
(* mark_debug = "true" *) wire [7:0] m_axi_awlen; (* mark_debug = "true" *) wire [7:0] m_axi_awlen;
@ -403,11 +404,18 @@ module fpgaTop
wire m01_axi_rvalid; wire m01_axi_rvalid;
wire m01_axi_rready; wire m01_axi_rready;
wire [3:0] SDCDatIn; // Old SDC input
// wire [3:0] SDCDatIn;
// New SDC Command IOBUF connections
wire sd_cmd_i;
reg sd_cmd_reg_o; reg sd_cmd_reg_o;
reg sd_cmd_reg_t; reg sd_cmd_reg_t;
// New SDC Data IOBUF connections
wire [3:0] sd_dat_i; wire [3:0] sd_dat_i;
reg [3:0] sd_dat_reg_o;
reg sd_dat_reg_t;
assign GPIOPinsIn = {28'b0, GPI}; assign GPIOPinsIn = {28'b0, GPI};
assign GPO = GPIOPinsOut[4:0]; assign GPO = GPIOPinsOut[4:0];
@ -418,12 +426,12 @@ module fpgaTop
// SD Card Tristate // SD Card Tristate
/*
IOBUF iobufSDCMD(.T(~SDCCmdOE), // iobuf's T is active low IOBUF iobufSDCMD(.T(~SDCCmdOE), // iobuf's T is active low
.I(SDCCmdOut), .I(SDCCmdOut),
.O(SDCCmdIn), .O(SDCCmdIn),
.IO(SDCCmd)); .IO(SDCCmd));
genvar i; genvar i;
generate generate
for (i = 0; i < 4; i = i + 1) begin for (i = 0; i < 4; i = i + 1) begin
@ -433,8 +441,20 @@ module fpgaTop
.IO(SDCDat[i])); .IO(SDCDat[i]));
end end
endgenerate endgenerate
*/
// IOBUF IOBUF_cmd (.O(sd_cmd_i), .IO(sdio_cmd), .I(sd_cmd_reg_o), .T(sd_cmd_reg_t));
// IOBUFS for new SDC peripheral
IOBUF IOBUF_cmd (.O(sd_cmd_i), .IO(SDCcmd), .I(sd_cmd_reg_o), .T(sd_cmd_reg_t));
genvar i;
generate
for (i = 0; i < 4; i = i + 1) begin
IOBUF iobufSDCDat(.T(sd_dat_reg_t),
.I(sd_dat_reg_o[i]),
.O(sd_dat_i[i]),
.IO(SDCDat[i]) );
end
endgenerate
// IOBUF IOBUF_dat0 (.O(sd_dat_i[0]), .IO(sdio_dat[0]), .I(sd_dat_reg_o[0]), .T(sd_dat_reg_t)); // IOBUF IOBUF_dat0 (.O(sd_dat_i[0]), .IO(sdio_dat[0]), .I(sd_dat_reg_o[0]), .T(sd_dat_reg_t));
// IOBUF IOBUF_dat1 (.O(sd_dat_i[1]), .IO(sdio_dat[1]), .I(sd_dat_reg_o[1]), .T(sd_dat_reg_t)); // IOBUF IOBUF_dat1 (.O(sd_dat_i[1]), .IO(sdio_dat[1]), .I(sd_dat_reg_o[1]), .T(sd_dat_reg_t));
// IOBUF IOBUF_dat2 (.O(sd_dat_i[2]), .IO(sdio_dat[2]), .I(sd_dat_reg_o[2]), .T(sd_dat_reg_t)); // IOBUF IOBUF_dat2 (.O(sd_dat_i[2]), .IO(sdio_dat[2]), .I(sd_dat_reg_o[2]), .T(sd_dat_reg_t));
@ -830,14 +850,13 @@ module fpgaTop
//.sdio_dat(4'b0), //.sdio_dat(4'b0),
//.sdio_cd(1'b0) //.sdio_cd(1'b0)
//.sd_dat_reg_t(), .sd_dat_reg_t(sd_dat_reg_t),
//.sd_dat_reg_o(), .sd_dat_reg_o(sd_dat_reg_o),
.sd_dat_i(4'b0), .sd_dat_i(sd_dat_i),
//.sd_cmd_reg_t(), .sd_cmd_reg_t(sd_cmd_reg_t),
//.sd_cmd_reg_o(), .sd_cmd_reg_o(sd_cmd_reg_o),
.sd_cmd_i(1'b0) .sd_cmd_i(sd_cmd_i)
); );
xlnx_axi_dwidth_conv_32to64 axi_conv_up xlnx_axi_dwidth_conv_32to64 axi_conv_up