Fixed merge issues on synthDC PR

This commit is contained in:
David Harris 2023-02-04 04:13:40 -08:00
commit b13087e706
6 changed files with 78 additions and 76 deletions

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@ -42,7 +42,7 @@ module RASPredictor #(parameter int StackSize = 16 )(
logic CounterEn; logic CounterEn;
localparam Depth = $clog2(StackSize); localparam Depth = $clog2(StackSize);
logic [Depth-1:0] NextPtr, CurrPtr, PtrP1, PtrM1; logic [Depth-1:0] NextPtr, Ptr, PtrP1, PtrM1;
logic [StackSize-1:0] [`XLEN-1:0] memory; logic [StackSize-1:0] [`XLEN-1:0] memory;
integer index; integer index;
@ -73,10 +73,10 @@ module RASPredictor #(parameter int StackSize = 16 )(
assign DecrementPtr = (PopF | DecRepairD) & ~IncrRepairD; assign DecrementPtr = (PopF | DecRepairD) & ~IncrRepairD;
mux2 #(Depth) PtrMux(PtrP1, PtrM1, DecrementPtr, NextPtr); mux2 #(Depth) PtrMux(PtrP1, PtrM1, DecrementPtr, NextPtr);
assign PtrM1 = CurrPtr - 1'b1; assign PtrM1 = Ptr - 1'b1;
assign PtrP1 = CurrPtr + 1'b1; assign PtrP1 = Ptr + 1'b1;
flopenr #(Depth) PTR(clk, reset, CounterEn, NextPtr, CurrPtr); flopenr #(Depth) PTR(clk, reset, CounterEn, NextPtr, Ptr);
// RAS must be reset. // RAS must be reset.
always_ff @ (posedge clk) begin always_ff @ (posedge clk) begin
@ -88,7 +88,7 @@ module RASPredictor #(parameter int StackSize = 16 )(
end end
end end
assign RASPCF = memory[CurrPtr]; assign RASPCF = memory[Ptr];
endmodule endmodule

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@ -109,6 +109,8 @@ module ifu (
logic [31:0] ICacheInstrF; // Instruction from the I$ logic [31:0] ICacheInstrF; // Instruction from the I$
logic [31:0] InstrRawF; // Instruction from the IROM, I$, or bus logic [31:0] InstrRawF; // Instruction from the IROM, I$, or bus
logic CompressedF; // The fetched instruction is compressed logic CompressedF; // The fetched instruction is compressed
logic CompressedD; // The decoded instruction is compressed
logic CompressedE; // The execution instruction is compressed
logic [31:0] PostSpillInstrRawF; // Fetch instruction after merge two halves of spill logic [31:0] PostSpillInstrRawF; // Fetch instruction after merge two halves of spill
logic [31:0] InstrRawD; // Non-decompressed instruction in the Decode stage logic [31:0] InstrRawD; // Non-decompressed instruction in the Decode stage
@ -297,18 +299,11 @@ module ifu (
// pcadder // pcadder
// add 2 or 4 to the PC, based on whether the instruction is 16 bits or 32 // add 2 or 4 to the PC, based on whether the instruction is 16 bits or 32
// *** consider using PCPlus2or4F = PCF + CompressedF ? 2 : 4;
assign PCPlus4F = PCF[`XLEN-1:2] + 1; // add 4 to PC assign PCPlus4F = PCF[`XLEN-1:2] + 1; // add 4 to PC
// choose PC+2 or PC+4 based on CompressedF, which arrives later. // choose PC+2 or PC+4 based on CompressedF, which arrives later.
// Speeds up critical path as compared to selecting adder input based on CompressedF // Speeds up critical path as compared to selecting adder input based on CompressedF
// *** consider gating PCPlus4F to provide the reset. // *** consider gating PCPlus4F to provide the reset.
/* -----\/----- EXCLUDED -----\/-----
assign PCPlus2or4F[0] = '0;
assign PCPlus2or4F[1] = ~reset & (CompressedF ^ PCF[1]);
assign PCPlus2or4F[`XLEN-1:2] = reset ? '0 : CompressedF & ~PCF[1] ? PCF[`XLEN-1:2] : PCPlus4F;
-----/\----- EXCLUDED -----/\----- */
/* -----\/----- EXCLUDED -----\/-----
assign PCPlus2or4F[1:0] = reset ? 2'b00 : CompressedF ? PCF[1] ? 2'b00 : 2'b10 : PCF[1:0];
-----/\----- EXCLUDED -----/\----- */
// *** There is actually a bug in the regression test. We fetched an address which returns data with // *** There is actually a bug in the regression test. We fetched an address which returns data with
// an X. This version of the code does not die because if CompressedF is an X it just defaults to the last // an X. This version of the code does not die because if CompressedF is an X it just defaults to the last
@ -377,6 +372,11 @@ module ifu (
flopenr #(32) InstrMReg(clk, reset, ~StallM, NextInstrE, InstrM); flopenr #(32) InstrMReg(clk, reset, ~StallM, NextInstrE, InstrM);
flopenr #(`XLEN) PCEReg(clk, reset, ~StallE, PCD, PCE); flopenr #(`XLEN) PCEReg(clk, reset, ~StallE, PCD, PCE);
flopenr #(`XLEN) PCMReg(clk, reset, ~StallM, PCE, PCM); flopenr #(`XLEN) PCMReg(clk, reset, ~StallM, PCE, PCM);
flopenr #(`XLEN) PCPDReg(clk, reset, ~StallD, PCPlus2or4F, PCLinkD); //flopenr #(`XLEN) PCPDReg(clk, reset, ~StallD, PCPlus2or4F, PCLinkD);
flopenr #(`XLEN) PCPEReg(clk, reset, ~StallE, PCLinkD, PCLinkE); //flopenr #(`XLEN) PCPEReg(clk, reset, ~StallE, PCLinkD, PCLinkE);
flopenrc #(1) CompressedDReg(clk, reset, FlushD, ~StallD, CompressedF, CompressedD);
flopenrc #(1) CompressedEReg(clk, reset, FlushE, ~StallE, CompressedD, CompressedE);
assign PCLinkE = PCE + (CompressedE ? 2 : 4);
endmodule endmodule

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@ -107,6 +107,9 @@ module spill #(
// merge together // merge together
mux2 #(32) postspillmux(InstrRawF, {InstrRawF[15:0], InstrFirstHalf}, SpillF, PostSpillInstrRawF); mux2 #(32) postspillmux(InstrRawF, {InstrRawF[15:0], InstrFirstHalf}, SpillF, PostSpillInstrRawF);
assign CompressedF = PostSpillInstrRawF[1:0] != 2'b11; // Need to use always comb to avoid pessimistic x propagation if PostSpillInstrRawF is x
always_comb
if (PostSpillInstrRawF[1:0] != 2'b11) CompressedF = 1'b1;
else CompressedF = 1'b0;
endmodule endmodule

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@ -12,7 +12,7 @@ export MOD ?= orig
# title to add a note in the synth's directory name # title to add a note in the synth's directory name
TITLE = TITLE =
# tsmc28, sky130, and sky90 presently supported # tsmc28, sky130, and sky90 presently supported
export TECH ?= sky90 export TECH ?= tsmc28
# MAXCORES allows parallel compilation, which is faster but less CPU-efficient # MAXCORES allows parallel compilation, which is faster but less CPU-efficient
# Avoid when doing sweeps of many optimization points in parallel # Avoid when doing sweeps of many optimization points in parallel
export MAXCORES ?= 1 export MAXCORES ?= 1
@ -20,6 +20,7 @@ export MAXCORES ?= 1
# The output netlist is hard to interpret, but significantly better PPA # The output netlist is hard to interpret, but significantly better PPA
export MAXOPT ?= 0 export MAXOPT ?= 0
export DRIVE ?= FLOP export DRIVE ?= FLOP
export USESRAM ?= 0
time := $(shell date +%F-%H-%M) time := $(shell date +%F-%H-%M)
hash := $(shell git rev-parse --short HEAD) hash := $(shell git rev-parse --short HEAD)
@ -27,14 +28,8 @@ export OUTPUTDIR := runs/$(DESIGN)_$(CONFIG)_$(MOD)_$(TECH)nm_$(FREQ)_MHz_$(time
export SAIFPOWER ?= 0 export SAIFPOWER ?= 0
OLDCONFIGDIR ?= ${WALLY}/config OLDCONFIGDIR ?= ${WALLY}/config
export CONFIGDIR ?= $(OUTPUTDIR)/hdl/config export CONFIGDIR ?= $(OUTPUTDIR)/config
CONFIGFILES ?= $(shell find $(CONFIGDIR) -name rv*_*)
CONFIGFILESTRIM = $(notdir $(CONFIGFILES))
print:
@echo $(FREQS)
@echo $(CONFIG)
@echo $(CONFIGFILESTRIM)
default: default:
@ -45,8 +40,6 @@ default:
DIRS32 = rv32e rv32gc rv32imc rv32i DIRS32 = rv32e rv32gc rv32imc rv32i
DIRS64 = rv64i rv64gc DIRS64 = rv64i rv64gc
DIRS32 = rv32e rv32gc rv32ic rv32i
DIRS64 = rv64i rv64gc
DIRS = $(DIRS32) $(DIRS64) DIRS = $(DIRS32) $(DIRS64)
# k = 3 6 # k = 3 6
@ -59,63 +52,66 @@ DIRS = $(DIRS32) $(DIRS64)
configs: $(CONFIG) configs: $(CONFIG)
$(CONFIG): $(CONFIG):
@echo $(CONFIG) @echo $(CONFIG)
cp -r $(OLDCONFIGDIR)/$(CONFIG) $(CONFIGDIR)/$(CONFIG)_orig cp -r $(OLDCONFIGDIR)/shared/*.vh $(CONFIGDIR)
sed -i 's/WAYSIZEINBYTES.*/WAYSIZEINBYTES 512/g' $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh cp -r $(OLDCONFIGDIR)/$(CONFIG)/* $(CONFIGDIR)
sed -i 's/NUMWAYS.*/NUMWAYS 1/g' $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i 's/BPRED_SIZE.*/BPRED_SIZE 5/g' $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh ifeq ($(USESRAM), 1)
sed -i 's/USE_SRAM.*/USE_SRAM 1/g' $(CONFIGDIR)/wally-shared.vh
ifneq ($(filter $ $(CONFIG), $(DIRS32)),)
sed -i "s/DTIM_RANGE.*/DTIM_RANGE 34\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i "s/IROM_RANGE.*/IROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 34\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
else ifneq ($(filter $ $(CONFIG), $(DIRS64)),)
sed -i "s/DTIM_RANGE.*/DTIM_RANGE 56\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i "s/IROM_RANGE.*/IROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 56\'h01FF/g" $(CONFIGDIR)/$(CONFIG)_orig/wally-config.vh
else else
sed -i 's/WAYSIZEINBYTES.*/WAYSIZEINBYTES 512/g' $(CONFIGDIR)/wally-config.vh
sed -i 's/NUMWAYS.*/NUMWAYS 1/g' $(CONFIGDIR)/wally-config.vh
sed -i 's/BPRED_SIZE.*/BPRED_SIZE 5/g' $(CONFIGDIR)/wally-config.vh
@echo "match32"
@echo $(filter $(CONFIG), $(DIRS32))
@echo "match64"
@echo $(filter $(CONFIG), $(DIRS64))
ifneq ($(filter $(CONFIG), $(DIRS32)),)
sed -i "s/DTIM_RANGE.*/DTIM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh
sed -i "s/IROM_RANGE.*/IROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh
sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh
sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 34\'h01FF/g" $(CONFIGDIR)/wally-config.vh
else ifneq ($(filter $(CONFIG), $(DIRS64)),)
sed -i "s/DTIM_RANGE.*/DTIM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh
sed -i "s/IROM_RANGE.*/IROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh
sed -i "s/BOOTROM_RANGE.*/BOOTROM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh
sed -i "s/UNCORE_RAM_RANGE.*/UNCORE_RAM_RANGE 56\'h01FF/g" $(CONFIGDIR)/wally-config.vh
else
$(info $(CONFIG) does not exist in $(DIRS32) or $(DIRS64)) $(info $(CONFIG) does not exist in $(DIRS32) or $(DIRS64))
@echo "Config not in list, RAM_RANGE will be unmodified" @echo "Config not in list, RAM_RANGE will be unmodified"
endif
endif endif
ifeq ($(MOD), FPUoff)
# turn off FPU # turn off FPU
cp -r $(CONFIGDIR)/$@_orig $(CONFIGDIR)/$@_FPUoff sed -i 's/1 *<< *3/0 << 3/' $(CONFIGDIR)/wally-config.vh
sed -i 's/1 *<< *3/0 << 3/' $(CONFIGDIR)/$@_FPUoff/wally-config.vh sed -i 's/1 *<< *5/0 << 5/' $(CONFIGDIR)/wally-config.vh
sed -i 's/1 *<< *5/0 << 5/' $(CONFIGDIR)/$@_FPUoff/wally-config.vh else ifeq ($(MOD), PMP16)
# PMP 16 # PMP 16
cp -r $(CONFIGDIR)/$@_FPUoff $(CONFIGDIR)/$@_PMP16 sed -i 's/PMP_ENTRIES \(64\|16\|0\)/PMP_ENTRIES 16/' $(CONFIGDIR)/wally-config.vh
sed -i 's/PMP_ENTRIES \(64\|16\|0\)/PMP_ENTRIES 16/' $(CONFIGDIR)/$@_PMP16/wally-config.vh else ifeq ($(MOD), PMP0)
# PMP 0 # PMP 0
cp -r $(CONFIGDIR)/$@_FPUoff $(CONFIGDIR)/$@_PMP0 sed -i 's/PMP_ENTRIES \(64\|16\|0\)/PMP_ENTRIES 0/' $(CONFIGDIR)/wally-config.vh
sed -i 's/PMP_ENTRIES \(64\|16\|0\)/PMP_ENTRIES 0/' $(CONFIGDIR)/$@_PMP0/wally-config.vh else ifeq ($(MOD), noMulDiv)
# no muldiv # no muldiv
cp -r $(CONFIGDIR)/$@_PMP0 $(CONFIGDIR)/$@_noMulDiv sed -i 's/1 *<< *12/0 << 12/' $(CONFIGDIR)/wally-config.vh
sed -i 's/1 *<< *12/0 << 12/' $(CONFIGDIR)/$@_noMulDiv/wally-config.vh else ifeq ($(MOD), noPriv)
# no priv # no priv
cp -r $(CONFIGDIR)/$@_noMulDiv $(CONFIGDIR)/$@_noPriv sed -i 's/ZICSR_SUPPORTED *1/ZICSR_SUPPORTED 0/' $(CONFIGDIR)/wally-config.vh
sed -i 's/ZICSR_SUPPORTED *1/ZICSR_SUPPORTED 0/' $(CONFIGDIR)/$@_noPriv/wally-config.vh
ifeq ($(SAIFPOWER), 1)
cp -f ../sim/power.saif .
endif endif
ifeq ($(SAIFPOWER), 1) ifeq ($(SAIFPOWER), 1)
cp -f ../sim/power.saif . cp -f ../sim/power.saif .
endif endif
freqs:
@$(foreach freq, $(FREQS), make synth DESIGN=wallypipelinedcore CONFIG=rv32e FREQ=$(freq) MAXCORES=1;)
mkdirecs: mkdirecs:
@echo "DC Synthesis" @echo "DC Synthesis"
@mkdir -p $(OUTPUTDIR) @mkdir -p $(OUTPUTDIR)
@mkdir -p $(OUTPUTDIR)/hdl/config @mkdir -p $(OUTPUTDIR)/hdl
@mkdir -p $(OUTPUTDIR)/hdl/config @mkdir -p $(OUTPUTDIR)/config
@mkdir -p $(OUTPUTDIR)/reports @mkdir -p $(OUTPUTDIR)/reports
@mkdir -p $(OUTPUTDIR)/mapped @mkdir -p $(OUTPUTDIR)/mapped
@mkdir -p $(OUTPUTDIR)/unmapped @mkdir -p $(OUTPUTDIR)/unmapped

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@ -18,15 +18,13 @@ set_host_options -max_cores $::env(MAXCORES)
# get outputDir and configDir from environment (Makefile) # get outputDir and configDir from environment (Makefile)
set outputDir $::env(OUTPUTDIR) set outputDir $::env(OUTPUTDIR)
set cfg $::env(CONFIGDIR)/$::env(CONFIG)_$::env(MOD)/wally-config.vh set cfg $::env(CONFIGDIR)
set hdl_src "../src" set hdl_src "../src"
set saifpower $::env(SAIFPOWER) set saifpower $::env(SAIFPOWER)
set maxopt $::env(MAXOPT) set maxopt $::env(MAXOPT)
set drive $::env(DRIVE) set drive $::env(DRIVE)
eval file copy -force $cfg {$outputDir/hdl/} eval file copy -force [glob ${cfg}/*.vh] {$outputDir/hdl/}
eval file copy -force $cfg {$outputDir/}
eval file copy -force [glob ${hdl_src}/../config/shared/*.vh] {$outputDir/hdl/}
eval file copy -force [glob ${hdl_src}/*/*.sv] {$outputDir/hdl/} eval file copy -force [glob ${hdl_src}/*/*.sv] {$outputDir/hdl/}
eval file copy -force [glob ${hdl_src}/*/*/*.sv] {$outputDir/hdl/} eval file copy -force [glob ${hdl_src}/*/*/*.sv] {$outputDir/hdl/}

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@ -1,13 +1,13 @@
#!/usr/bin/python3 #!/usr/bin/python3
# Madeleine Masser-Frye mmasserfrye@hmc.edu 6/22 # Madeleine Masser-Frye mmasserfrye@hmc.edu 1/2023
import subprocess import subprocess
from multiprocessing import Pool from multiprocessing import Pool
import argparse import argparse
def runSynth(config, mod, tech, freq, maxopt): def runSynth(config, mod, tech, freq, maxopt, usesram):
global pool global pool
command = "make synth DESIGN=wallypipelinedcore CONFIG={} MOD={} TECH={} DRIVE=FLOP FREQ={} MAXOPT={} MAXCORES=1".format(config, mod, tech, freq, maxopt) command = "make synth DESIGN=wallypipelinedcore CONFIG={} MOD={} TECH={} DRIVE=FLOP FREQ={} MAXOPT={} USESRAM={} MAXCORES=1".format(config, mod, tech, freq, maxopt, usesram)
pool.map(mask, [command]) pool.map(mask, [command])
def mask(command): def mask(command):
@ -32,6 +32,7 @@ if __name__ == '__main__':
parser.add_argument("-t", "--targetfreq", type=int, help = "Target frequncy") parser.add_argument("-t", "--targetfreq", type=int, help = "Target frequncy")
parser.add_argument("-e", "--tech", choices=techs, help = "Technology") parser.add_argument("-e", "--tech", choices=techs, help = "Technology")
parser.add_argument("-o", "--maxopt", action='store_true', help = "Turn on MAXOPT") parser.add_argument("-o", "--maxopt", action='store_true', help = "Turn on MAXOPT")
parser.add_argument("-r", "--usesram", action='store_true', help = "Use SRAM modules")
args = parser.parse_args() args = parser.parse_args()
@ -39,17 +40,21 @@ if __name__ == '__main__':
defaultfreq = 3000 if tech == 'sky90' else 10000 defaultfreq = 3000 if tech == 'sky90' else 10000
freq = args.targetfreq if args.targetfreq else defaultfreq freq = args.targetfreq if args.targetfreq else defaultfreq
maxopt = int(args.maxopt) maxopt = int(args.maxopt)
mod = 'orig' # until memory integrated usesram = int(args.usesram)
mod = 'orig'
if args.freqsweep: if args.freqsweep:
sc = args.freqsweep sc = args.freqsweep
config = args.version if args.version else 'rv32e' config = args.version if args.version else 'rv32e'
for freq in [round(sc+sc*x/100) for x in freqVaryPct]: # rv32e freq sweep for freq in [round(sc+sc*x/100) for x in freqVaryPct]: # rv32e freq sweep
runSynth(config, mod, tech, freq, maxopt) runSynth(config, mod, tech, freq, maxopt, usesram)
if args.configsweep: if args.configsweep:
for config in ['rv32i', 'rv64gc', 'rv64i', 'rv32gc', 'rv32imc', 'rv32e']: #configs for config in ['rv32i', 'rv64gc', 'rv64i', 'rv32gc', 'rv32imc', 'rv32e']: #configs
runSynth(config, mod, tech, freq, maxopt) runSynth(config, mod, tech, freq, maxopt, usesram)
if args.featuresweep: if args.featuresweep:
config = args.version if args.version else 'rv64gc' config = args.version if args.version else 'rv64gc'
for mod in ['FPUoff', 'noMulDiv', 'noPriv', 'PMP0', 'PMP16']: # rv64gc path variations 'orig', for mod in ['FPUoff', 'noMulDiv', 'noPriv', 'PMP0', 'PMP16']: # rv64gc path variations 'orig',
runSynth(config, mod, tech, freq, maxopt) runSynth(config, mod, tech, freq, maxopt, usesram)
else:
config = args.version if args.version else 'rv64gc'
runSynth(config, mod, tech, freq, maxopt, usesram)