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https://github.com/openhwgroup/cvw
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Running 16-bit square root cases first in testfloat
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@ -9,4 +9,4 @@
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# sqrt - test square root
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# sqrt - test square root
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# all - test everything
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# all - test everything
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vsim -do "do testfloat.do rv64fp $1"
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vsim -do "do testfloat.do rv64fpquad $1"
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@ -34,7 +34,7 @@ vlib work
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# $num = the added words after the call
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# $num = the added words after the call
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vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/generic/*.sv ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697
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vlog +incdir+../config/$1 +incdir+../config/shared ../testbench/testbench-fp.sv ../src/fpu/*.sv ../src/generic/*.sv ../src/generic/flop/*.sv -suppress 2583,7063,8607,2697
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vsim -voptargs=+acc work.testbenchfp -G TEST=$2 -suppress 4014
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vsim -voptargs=+acc work.testbenchfp -G TEST=$2
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view wave
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view wave
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#-- display input and output signals as hexidecimal values
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#-- display input and output signals as hexidecimal values
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@ -585,13 +585,21 @@ module testbenchfp;
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end
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end
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if (TEST === "sqrt" | TEST === "all") begin // if sqrt is being tested
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if (TEST === "sqrt" | TEST === "all") begin // if sqrt is being tested
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// add the correct tests/op-ctrls/unit/fmt to their lists
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// add the correct tests/op-ctrls/unit/fmt to their lists
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// reverse order
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Tests = {f16sqrt, Tests};
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Tests = {f16sqrt, Tests};
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OpCtrl = {`SQRT_OPCTRL, OpCtrl};
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WriteInt = {1'b0, WriteInt};
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for(int i = 0; i<5; i++) begin
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Unit = {`DIVUNIT, Unit};
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Fmt = {2'b10, Fmt};
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end
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/* Tests = {Tests, f16sqrt};
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OpCtrl = {OpCtrl, `SQRT_OPCTRL};
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OpCtrl = {OpCtrl, `SQRT_OPCTRL};
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WriteInt = {WriteInt, 1'b0};
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WriteInt = {WriteInt, 1'b0};
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for(int i = 0; i<5; i++) begin
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for(int i = 0; i<5; i++) begin
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Unit = {Unit, `DIVUNIT};
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Unit = {Unit, `DIVUNIT};
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Fmt = {Fmt, 2'b10};
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Fmt = {Fmt, 2'b10};
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end
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end */
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end
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end
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if (TEST === "fma" | TEST === "all") begin // if fma is being tested
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if (TEST === "fma" | TEST === "all") begin // if fma is being tested
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Tests = {Tests, f16fma};
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Tests = {Tests, f16fma};
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