Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Refactor git repo checks to use a function

Browse Source
This commit is contained in:
Jordan Carlin 2024-07-18 22:32:03 -07:00
parent 85a84dcbed
commit af796116c9
1 changed files with 26 additions and 11 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

37
bin/wally-tool-chain-install.sh
View File

@ -61,6 +61,20 @@ section_header() {
printf "%$(tput cols)s${ENDC}" | tr ' ' '#'
}
# Check if a git repository exists, is up to date, and has been installed
# Clones the repository if it doesn't exist
git_check() {
local repo=$1
local url=$2
local check=$3
local branch="${4:-master}"
if [[ ((! -e $repo) && ($(git clone "$url") || true)) || ($(cd "$repo"; git fetch; git rev-parse HEAD) != $(cd repo; git rev-parse origin/"$branch")) || (! -e $check) ]]; then
return 1
else
return 0
fi
}
set -e # break on error
trap error ERR # run error handler on error
STATUS="setup" # keep track of what part of the installation is running for error messages
@ -199,7 +213,7 @@ fi
section_header "Installing/Updating RISC-V GNU Toolchain"
STATUS="RISC-V GNU Toolchain"
cd "$RISCV"
if [[ ((! -e riscv-gnu-toolchain) && ($(git clone https://github.com/riscv/riscv-gnu-toolchain) || true)) || ($(cd riscv-gnu-toolchain; git fetch; git rev-parse HEAD) != $(cd riscv-gnu-toolchain; git rev-parse origin/master)) || (! -e $RISCV/riscv-gnu-toolchain/stamps/build-gcc-newlib-stage2) ]]; then
if git_check "riscv-gnu-toolchain" "https://github.com/riscv/riscv-gnu-toolchain" "$RISCV/riscv-gnu-toolchain/stamps/build-gcc-newlib-stage2"; then
cd riscv-gnu-toolchain
git reset --hard && git clean -f && git checkout master && git pull
git pull
@ -222,7 +236,7 @@ section_header "Installing/Updating elf2hex"
STATUS="elf2hex"
cd "$RISCV"
export PATH=$RISCV/bin:$PATH
if [[ ((! -e elf2hex) && ($(git clone https://github.com/sifive/elf2hex.git) || true)) || ($(cd elf2hex; git fetch; git rev-parse HEAD) != $(cd elf2hex; git rev-parse origin/master)) || (! -e $RISCV/bin/riscv64-unknown-elf-elf2bin) ]]; then
if git_check "elf2hex" "https://github.com/sifive/elf2hex.git" "$RISCV/bin/riscv64-unknown-elf-elf2bin"; then
cd elf2hex
git reset --hard && git clean -f && git checkout master && git pull
autoreconf -i
@ -240,9 +254,10 @@ fi
section_header "Installing/Updating QEMU"
STATUS="QEMU"
cd "$RISCV"
if [[ ((! -e qemu) && ($(git clone --recurse-submodules -j ${NUM_THREADS} https://github.com/qemu/qemu) || true)) || ($(cd qemu; git fetch; git rev-parse HEAD) != $(cd qemu; git rev-parse origin/master)) || (! -e $RISCV/include/qemu-plugin.h) ]]; then
if git_check "qemu" "https://github.com/qemu/qemu" "$RISCV/include/qemu-plugin.h"; then
cd qemu
git reset --hard && git clean -f && git checkout master && git pull --recurse-submodules -j ${NUM_THREADS}
submodule update --init --recursive
./configure --target-list=riscv64-softmmu --prefix="$RISCV"
make -j ${NUM_THREADS}
make install
@ -257,7 +272,7 @@ fi
section_header "Installing/Updating SPIKE"
STATUS="SPIKE"
cd "$RISCV"
if [[ ((! -e riscv-isa-sim) && ($(git clone https://github.com/riscv-software-src/riscv-isa-sim) || true)) || ($(cd riscv-isa-sim; git fetch; git rev-parse HEAD) != $(cd riscv-isa-sim; git rev-parse origin/master)) || (! -e $RISCV/lib/pkgconfig/riscv-riscv.pc) ]]; then
if git_check "riscv-isa-sim" "https://github.com/riscv-software-src/riscv-isa-sim" "$RISCV/lib/pkgconfig/riscv-riscv.pc"; then
cd riscv-isa-sim
git reset --hard && git clean -f && git checkout master && git pull
mkdir -p build
@ -278,13 +293,13 @@ fi
section_header "Installing/Updating Verilator"
STATUS="Verilator"
cd "$RISCV"
if [[ ((! -e verilator) && ($(git clone https://github.com/verilator/verilator) || true)) || ($(cd verilator; git fetch; git rev-parse HEAD) != $(cd verilator; git rev-parse origin/master)) || (! -e $RISCV/share/pkgconfig/verilator.pc) ]]; then
unset VERILATOR_ROOT # For bash
if git_check "verilator" "https://github.com/verilator/verilator" "$RISCV/share/pkgconfig/verilator.pc"; then
unset VERILATOR_ROOT
cd verilator
git reset --hard && git clean -f && git checkout master && git pull
autoconf # Create ./configure script
./configure --prefix="$RISCV" # Configure and create Makefile
make -j ${NUM_THREADS} # Build Verilator itself (if error, try just 'make')
autoconf
./configure --prefix="$RISCV"
make -j ${NUM_THREADS}
make install
echo -e "${SUCCESS_COLOR}Verilator successfully installed${ENDC}"
else
@ -329,7 +344,7 @@ echo -e "${SUCCESS_COLOR}Sail Compiler successfully installed/updated${ENDC}"
# The RISC-V Sail Model is the golden reference model for RISC-V. It is written in Sail (described above)
section_header "Installing/Updating RISC-V Sail Model"
STATUS="RISC-V Sail Model"
if [[ ((! -e sail-riscv) && ($(git clone https://github.com/riscv/sail-riscv.git) || true)) || ($(cd sail-riscv; git fetch; git rev-parse HEAD) != $(cd sail-riscv; git rev-parse origin/master)) || (! -e $RISCV/bin/riscv_sim_RV32) ]]; then
if git_check "sail-riscv" "https://github.com/riscv/sail-riscv.git" "$RISCV/bin/riscv_sim_RV32"; then
eval "$(opam config env)"
cd sail-riscv
git reset --hard && git clean -f && git checkout master && git pull
@ -358,7 +373,7 @@ section_header "Installing/Updating OSU Skywater 130 cell library"
STATUS="OSU Skywater 130 cell library"
mkdir -p "$RISCV"/cad/lib
cd "$RISCV"/cad/lib
if [[ ((! -e sky130_osu_sc_t12) && ($(git clone https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12) || true)) || ($(cd sky130_osu_sc_t12; git fetch; git rev-parse HEAD) != $(cd sky130_osu_sc_t12; git rev-parse origin/main)) ]]; then
if git_check "sky130_osu_sc_t12" "https://foss-eda-tools.googlesource.com/skywater-pdk/libs/sky130_osu_sc_t12" "$RISCV/cad/lib/sky130_osu_sc_t12" "main"; then
cd sky130_osu_sc_t12
git reset --hard && git clean -f && git checkout main && git pull
echo -e "${SUCCESS_COLOR}OSU Skywater library successfully installed${ENDC}"