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kaveh pezeshki 2021-02-26 02:22:08 -08:00
parent 251aa982eb
commit adadc21fc6
1 changed files with 1 additions and 1 deletions
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wally-pipelined/testbench/testbench-busybear.sv
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@ -365,7 +365,7 @@ module testbench_busybear();
readPC = RAM[RAMPC] >> PCF[2] * 32; readPC = RAM[RAMPC] >> PCF[2] * 32;
end end
//$write(""); // I know this does nothing, the first instruction doesn't load for me without it $write(""); // I know this does nothing, the first instruction doesn't load for me without it
if (PCF >= 'h1000 && PCF <= 'h2FFF) begin if (PCF >= 'h1000 && PCF <= 'h2FFF) begin
readPC = bootram[RAMPC] >> PCF[2] * 32; readPC = bootram[RAMPC] >> PCF[2] * 32;
end end