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https://github.com/openhwgroup/cvw
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turn off IDIVONFPU when FSUPPORTED=0. Already checked in sim, but need it in synth too for feature sweep
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@ -74,8 +74,8 @@ localparam ICACHE_LINELENINBITS = 32'd512;
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// Integer Divider Configuration
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// Integer Divider Configuration
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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// IDIV_BITSPERCYCLE must be 1, 2, or 4
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localparam IDIV_BITSPERCYCLE = 32'd4;
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localparam IDIV_BITSPERCYCLE = 32'd2;
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localparam IDIV_ON_FPU = 1;
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localparam IDIV_ON_FPU = 0;
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// Legal number of PMP entries are 0, 16, or 64
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// Legal number of PMP entries are 0, 16, or 64
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localparam PMP_ENTRIES = 32'd16;
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localparam PMP_ENTRIES = 32'd16;
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@ -131,7 +131,7 @@ module datapath import cvw::*; #(parameter cvw_t P) (
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if (P.F_SUPPORTED) begin:fpmux
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if (P.F_SUPPORTED) begin:fpmux
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mux2 #(P.XLEN) resultmuxM(IEUResultM, FIntResM, FWriteIntM, IFResultM);
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mux2 #(P.XLEN) resultmuxM(IEUResultM, FIntResM, FWriteIntM, IFResultM);
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mux2 #(P.XLEN) cvtresultmuxW(IFResultW, FCvtIntResW, FCvtIntW, IFCvtResultW);
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mux2 #(P.XLEN) cvtresultmuxW(IFResultW, FCvtIntResW, FCvtIntW, IFCvtResultW);
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if (P.IDIV_ON_FPU) begin
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if (P.IDIV_ON_FPU & P.F_SUPPORTED) begin
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mux2 #(P.XLEN) divresultmuxW(MDUResultW, FIntDivResultW, IntDivW, MulDivResultW);
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mux2 #(P.XLEN) divresultmuxW(MDUResultW, FIntDivResultW, IntDivW, MulDivResultW);
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end else begin
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end else begin
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assign MulDivResultW = MDUResultW;
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assign MulDivResultW = MDUResultW;
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@ -57,7 +57,7 @@ module mdu import cvw::*; #(parameter cvw_t P) (
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// Start a divide when a new division instruction is received and the divider isn't already busy or finishing
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// Start a divide when a new division instruction is received and the divider isn't already busy or finishing
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// When IDIV_ON_FPU is set, use the FPU divider instead
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// When IDIV_ON_FPU is set, use the FPU divider instead
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// In ZMMUL, with M_SUPPORTED = 0, omit the divider
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// In ZMMUL, with M_SUPPORTED = 0, omit the divider
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if ((P.IDIV_ON_FPU) || (!P.M_SUPPORTED)) begin:nodiv
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if ((P.IDIV_ON_FPU & P.F_SUPPORTED) || (!P.M_SUPPORTED)) begin:nodiv
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assign QuotM = 0;
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assign QuotM = 0;
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assign RemM = 0;
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assign RemM = 0;
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assign DivBusyE = 0;
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assign DivBusyE = 0;
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