mirror of
https://github.com/openhwgroup/cvw
synced 2025-02-02 17:55:19 +00:00
Attempt at functional coverage; breaks code and functional coverage
This commit is contained in:
David Harris
parent
ff15671878
commit
ac05fa5553
86
Makefile
86
Makefile
@ -25,92 +25,6 @@ verify:
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cd ${SIM}/sim; ./sim-testfloat-batch all
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make imperasdv
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imperasdv:
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iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m
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iter-elf.bash --search ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m
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imperasdv_cov:
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touch ${SIM}/seed0.txt
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echo "0" > ${SIM}/seed0.txt
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# /opt/riscv/ImperasDV-OpenHW/scripts/cvw/run-elf-cov.bash --verbose --seed 0 --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m
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# /opt/riscv/ImperasDV-OpenHW/scripts/cvw/run-elf-cov.bash --elf ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/dut/my.elf --seed ${SIM}/seed0.txt --coverdb ${SIM}/cov/rv64gc_arch64i.ucdb --verbose
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# /opt/riscv/ImperasDV-OpenHW/scripts/cvw/run-elf-cov.bash --elf ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/dut/my.elf --seed ${SIM}/seed0.txt --coverdb ${SIM}/questa/riscv.ucdb --verbose
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run-elf-cov.bash --elf ${WALLY}/tests/riscvdv/asm_test/riscv_arithmetic_basic_test_0.elf --seed ${SIM}/questa/seed0.txt --coverdb ${SIM}/questa/riscv.ucdb --verbose
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vcover report -details -html ${SIM}/questa/riscv.ucdb
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funcovreg:
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m --cover
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/I --cover
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/privilege --cover
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/Q --cover
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rm -f ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/*/src/*/dut/my.elf
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iter-elf.bash --search ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I --cover
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vcover report -details -html ${SIM}/questa/riscv.ucdb
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# test_name=riscv_arithmetic_basic_test
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riscvdv:
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python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gen,gcc_compile >> ${SIM}/questa/functcov_logs/${test_name}.log 2>&1
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# python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gcc_compile >> ${SIM}/questa/functcov_logs/${test_name}.log 2>&1
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# python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps iss_sim >> ${SIM}/questa/functcov_logs/${test_name}.log 2>&1
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# run-elf.bash --seed ${SIM}/questa/seed0.txt --verbose --elf ${WALLY}/tests/riscvdv/asm_test/${test_name}_0.o >> ${SIM}/questa/functcov_logs/${test_name}.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/riscv.ucdb --elf ${WALLY}/tests/riscvdv/asm_test/${test_name}_0.o >> ${SIM}/questa/functcov_logs/${test_name}.log 2>&1
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#cp ${SIM}/questa/riscv.ucdb ${SIM}/questa/functcov_ucdbs/${test_name}.ucdb
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riscvdv_functcov:
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mkdir -p ${SIM}/questa/functcov_logs
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mkdir -p ${SIM}/questa/functcov_ucdbs
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cd ${SIM}/questa/functcov_logs && rm -rf *
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cd ${SIM}/questa/functcov_ucdbs && rm -rf *
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make riscvdv test_name=riscv_arithmetic_basic_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_amo_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_ebreak_debug_mode_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_ebreak_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_floating_point_arithmetic_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_floating_point_mmu_stress_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_floating_point_rand_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_full_interrupt_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_hint_instr_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_illegal_instr_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_invalid_csr_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_jump_stress_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_loop_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_machine_mode_rand_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_mmu_stress_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_no_fence_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_non_compressed_instr_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_pmp_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_privileged_mode_rand_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_rand_instr_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_rand_jump_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_sfence_exception_test >> ${SIM}/questa/functcov.log 2>&1
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make riscvdv test_name=riscv_unaligned_load_store_test >> ${SIM}/questa/functcov.log 2>&1
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combine_functcov:
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mkdir -p ${SIM}/questa/functcov
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mkdir -p ${SIM}/questa/functcov_logs
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cd ${SIM}/questa/functcov && rm -rf *
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wsim rv64gc ${WALLY}/tests/functcov/rv64/I/WALLY-COV-add.elf > ${SIM}/questa/functcov_logs/add.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/functcov/add.ucdb --elf ${WALLY}/tests/functcov/rv64/I/WALLY-COV-add.elf >> ${SIM}/questa/functcov_logs/add.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/functcov/and.ucdb --elf ${WALLY}/tests/functcov/rv64/I/WALLY-COV-and.elf >> ${SIM}/questa/functcov_logs/add.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/functcov/ori.ucdb --elf ${WALLY}/tests/functcov/rv64/I/WALLY-COV-ori.elf >> ${SIM}/questa/functcov_logs/add.log 2>&1
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vcover merge ${SIM}/questa/functcov/functcov.ucdb ${SIM}/questa/functcov/*.ucdb ${SIM}/questa/functcov_ucdbs/* -suppress 6854 -64
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# vcover merge ${SIM}/questa/functcov/functcov.ucdb ${SIM}/questa/functcov_ucdbs/* -suppress 6854 -64
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vcover report -details -html ${SIM}/questa/functcov/functcov.ucdb
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vcover report ${SIM}/questa/functcov/functcov.ucdb -details -cvg > ${SIM}/questa/functcov/functcov.log
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vcover report ${SIM}/questa/functcov/functcov.ucdb -testdetails -cvg > ${SIM}/questa/functcov/functcov.testdetails.log
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# vcover report ${SIM}/questa/functcov/functcov.ucdb -details -cvg -below 100 | egrep "Coverpoint|Covergroup|Cross" | grep -v Metric > ${SIM}/questa/functcov/functcov.ucdb.summary.log
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vcover report ${SIM}/questa/functcov/functcov.ucdb -details -cvg | egrep "Coverpoint|Covergroup|Cross|TYPE" > ${SIM}/questa/functcov/functcov.summary.log
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grep "Total Coverage By Instance" ${SIM}/questa/functcov/functcov.ucdb.log
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remove_functcov_artifacts:
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rm ${SIM}/questa/riscv.ucdb ${SIM}/questa/functcov.log ${SIM}/questa/covhtmlreport/ ${SIM}/questa/functcov_logs/ ${SIM}/questa/functcov_ucdbs/ ${SIM}/questa/functcov/ -rf
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collect_functcov: remove_functcov_artifacts riscvdv_functcov combine_functcov
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benchmarks:
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make coremark
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make embench
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2
bin/wsim
2
bin/wsim
@ -93,7 +93,7 @@ if (args.fcov):
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# create the output sub-directories.
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regressionDir = WALLY + '/sim/'
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for d in ["logs", "wkdir", "cov", "ucdb"]:
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for d in ["logs", "wkdir", "cov", "ucdb", "fcov", "fcov_ucdb"]:
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try:
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os.mkdir(regressionDir+args.sim+"/"+d)
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except:
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98
sim/Makefile
98
sim/Makefile
@ -1,19 +1,10 @@
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# David_Harris@hmc.edu 15 July 2024
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# Simulation Makefile for CORE-V-Wally
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# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
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SIM = ${WALLY}/sim
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all: riscoftests memfiles coveragetests deriv
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# *** Build old tests/imperas-riscv-tests for now;
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# Delete this part when the privileged tests transition over to tests/wally-riscv-arch-test
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# DH: 2/27/22 temporarily commented out imperas-riscv-tests because license expired
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#make -C ../tests/imperas-riscv-tests --jobs
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#make -C ../tests/imperas-riscv-tests XLEN=64 --jobs
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# Only compile Imperas tests if they are installed locally.
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# They are usually a symlink to $RISCV/imperas-riscv-tests and only
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# get compiled there manually during installation
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#make -C ../addins/imperas-riscv-tests
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#make -C ../addins/imperas-riscv-tests XLEN=64
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#cd ../addins/imperas-riscv-tests; elf2hex.sh
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#cd ../addins/imperas-riscv-tests; extractFunctionRadix.sh work/*/*/*.elf.objdump
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# Link Linux test vectors
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#cd ../tests/linux-testgen/linux-testvectors/;./tvLinker.sh
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wally-riscv-arch-test: wallyriscoftests memfiles
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@ -39,6 +30,85 @@ QuestaCodeCoverage: questa/ucdb/rv64gc_arch64i.ucdb
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# vcover report -recursive questa/ucdb/cov.ucdb > questa/cov/rv64gc_recursive.rpt
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vcover report -details -threshH 100 -html questa/ucdb/cov.ucdb
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imperasdv_cov:
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touch ${SIM}/seed0.txt
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echo "0" > ${SIM}/seed0.txt
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# /opt/riscv/ImperasDV-OpenHW/scripts/cvw/run-elf-cov.bash --verbose --seed 0 --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m
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# /opt/riscv/ImperasDV-OpenHW/scripts/cvw/run-elf-cov.bash --elf ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/dut/my.elf --seed ${SIM}/seed0.txt --coverdb ${SIM}/cov/rv64gc_arch64i.ucdb --verbose
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# /opt/riscv/ImperasDV-OpenHW/scripts/cvw/run-elf-cov.bash --elf ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I/src/add-01.S/dut/my.elf --seed ${SIM}/seed0.txt --coverdb ${SIM}/questa/riscv.ucdb --verbose
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run-elf-cov.bash --elf ${WALLY}/tests/riscvdv/asm_test/riscv_arithmetic_basic_test_0.elf --seed ${SIM}/questa/seed0.txt --coverdb ${SIM}/questa/riscv.ucdb --verbose
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vcover report -details -html ${SIM}/questa/riscv.ucdb
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funcovreg:
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m --cover
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/I --cover
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/privilege --cover
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#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/Q --cover
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rm -f ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/*/src/*/dut/my.elf
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iter-elf.bash --search ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I --cover
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vcover report -details -html ${SIM}/questa/riscv.ucdb
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riscvdv:
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python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gen,gcc_compile >> ${SIM}/questa/fcov_logs/${test_name}.log 2>&1
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# python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps gcc_compile >> ${SIM}/questa/fcov_logs/${test_name}.log 2>&1
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# python3 ${WALLY}/addins/riscv-dv/run.py --test ${test_name} --target rv64gc --output tests/riscvdv --iterations 1 -si questa --iss spike --verbose --cov --seed 0 --steps iss_sim >> ${SIM}/questa/fcov_logs/${test_name}.log 2>&1
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# run-elf.bash --seed ${SIM}/questa/seed0.txt --verbose --elf ${WALLY}/tests/riscvdv/asm_test/${test_name}_0.o >> ${SIM}/questa/fcov_logs/${test_name}.log 2>&1
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riscvdv_functcov:
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mkdir -p ${SIM}/questa/fcov_logs
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mkdir -p ${SIM}/questa/fcov_ucdbs
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cd ${SIM}/questa/fcov_logs && rm -rf *
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cd ${SIM}/questa/fcov_ucdbs && rm -rf *
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make riscvdv test_name=riscv_arithmetic_basic_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_amo_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_ebreak_debug_mode_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_ebreak_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_floating_point_arithmetic_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_floating_point_mmu_stress_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_floating_point_rand_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_full_interrupt_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_hint_instr_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_illegal_instr_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_invalid_csr_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_jump_stress_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_loop_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_machine_mode_rand_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_mmu_stress_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_no_fence_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_non_compressed_instr_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_pmp_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_privileged_mode_rand_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_rand_instr_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_rand_jump_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_sfence_exception_test >> ${SIM}/questa/fcov.log 2>&1
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make riscvdv test_name=riscv_unaligned_load_store_test >> ${SIM}/questa/fcov.log 2>&1
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combine_functcov:
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mkdir -p ${SIM}/questa/fcov
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mkdir -p ${SIM}/questa/fcov_logs
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cd ${SIM}/questa/fcov && rm -rf *
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wsim rv64gc ${WALLY}/tests/functcov/rv64/I/WALLY-COV-add.elf --fcov > ${SIM}/questa/fcov_logs/add.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/fcov/add.ucdb --elf ${WALLY}/tests/functcov/rv64/I/WALLY-COV-add.elf >> ${SIM}/questa/fcov_logs/add.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/fcov/and.ucdb --elf ${WALLY}/tests/functcov/rv64/I/WALLY-COV-and.elf >> ${SIM}/questa/fcov_logs/add.log 2>&1
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#run-elf-cov.bash --seed ${SIM}/questa/seed0.txt --verbose --coverdb ${SIM}/questa/fcov/ori.ucdb --elf ${WALLY}/tests/functcov/rv64/I/WALLY-COV-ori.elf >> ${SIM}/questa/fcov_logs/add.log 2>&1
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vcover merge ${SIM}/questa/fcov_ucdb/fcov.ucdb ${SIM}/questa/fcov_ucdb/*.ucdb ${SIM}/questa/fcov_ucdb/* -suppress 6854 -64
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# vcover merge ${SIM}/questa/fcov/fcov.ucdb ${SIM}/questa/fcov_ucdbs/* -suppress 6854 -64
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vcover report -details -html ${SIM}/questa/fcov_ucdb/fcov.ucdb
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vcover report ${SIM}/questa/fcov_ucdb/fcov.ucdb -details -cvg > ${SIM}/questa/fcov/fcov.log
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vcover report ${SIM}/questa/fcov_ucdb/fcov.ucdb -testdetails -cvg > ${SIM}/questa/fcov/fcov.testdetails.log
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# vcover report ${SIM}/questa/fcov/fcov.ucdb -details -cvg -below 100 | egrep "Coverpoint|Covergroup|Cross" | grep -v Metric > ${SIM}/questa/fcov/fcov.ucdb.summary.log
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vcover report ${SIM}/questa/fcov_ucdb/fcov.ucdb -details -cvg | egrep "Coverpoint|Covergroup|Cross|TYPE" > ${SIM}/questa/fcov/fcov.summary.log
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grep "Total Coverage By Instance" ${SIM}/questa/fcov/fcov.log
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remove_functcov_artifacts:
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rm ${SIM}/questa/riscv.ucdb ${SIM}/questa/fcov.log ${SIM}/questa/covhtmlreport/ ${SIM}/questa/fcov_logs/ ${SIM}/questa/fcov_ucdbs/ ${SIM}/questa/fcov/ -rf
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collect_functcov: remove_functcov_artifacts riscvdv_functcov combine_functcov
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allclean: clean all
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clean:
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@ -57,6 +57,7 @@ set FCdefineCOVER_RV64D ""
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set FCdefineCOVER_RV64ZICSR ""
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set FCdefineCOVER_RV64C ""
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set FCdefineIDV_INCLUDE_TRACE2COV ""
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set FCTRACE2COV ""
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set lockstep 0
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# ok this is annoying. vlog, vopt, and vsim are very picky about how arguments are passed.
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@ -65,7 +66,7 @@ set lockstep 0
|
||||
set lockstepvoptstring ""
|
||||
set SVLib ""
|
||||
set SVLibPath ""
|
||||
#set OtherFlags ""
|
||||
set OtherFlags ""
|
||||
set ImperasPubInc ""
|
||||
set ImperasPrivInc ""
|
||||
set rvviFiles ""
|
||||
@ -129,9 +130,10 @@ if {$FunctCoverageIndex >= 0} {
|
||||
set FCdefineCOVER_RV64ZICSR "+define+COVER_RV64ZICSR"
|
||||
set FCdefineCOVER_RV64C "+define+COVER_RV64C"
|
||||
set FCdefineIDV_INCLUDE_TRACE2COV "+define+IDV_INCLUDE_TRACE2COV"
|
||||
set FCTRACE2COV "+TRACE2COV_ENABLE=1 +VERBOSE=1"
|
||||
|
||||
set lst [lreplace $lst $FunctCoverageIndex $FunctCoverageIndex]
|
||||
}
|
||||
}\
|
||||
|
||||
set LockStepIndex [lsearch -exact $lst "--lockstep"]
|
||||
# ugh. can't have more than 9 arguments passed to vsim. why? I'll have to remove --lockstep when running
|
||||
@ -148,13 +150,14 @@ if {$LockStepIndex >= 0 || $FunctCoverageIndex >= 0} {
|
||||
set idvFiles $env(IMPERAS_HOME)/ImpProprietary/source/host/idv/*.sv
|
||||
set SVLib "-sv_lib"
|
||||
set SVLibPath $env(IMPERAS_HOME)/lib/Linux64/ImperasLib/imperas.com/verification/riscv/1.0/model
|
||||
#set OtherFlags $env(OTHERFLAGS)
|
||||
#set OtherFlags $::env(OTHERFLAGS) # not working 7/15/24 dh; this should be the way to pass things like --verbose (Issue 871)
|
||||
|
||||
if {$LockStepIndex >= 0} {
|
||||
set lst [lreplace $lst $LockStepIndex $LockStepIndex]
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
# separate the +args from the -G parameters
|
||||
foreach otherArg $lst {
|
||||
if {[string index $otherArg 0] eq "+"} {
|
||||
@ -201,7 +204,7 @@ vopt $accFlag wkdir/${CFG}_${TESTSUITE}.${TESTBENCH} -work ${WKDIR} ${ParamArgs}
|
||||
|
||||
#vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 ${SVLib} ${SVLibPath} ${OtherFlags} +TRACE2COV_ENABLE=1 -suppress 3829 ${CoverageVsimArg}
|
||||
#vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} ${PlusArgs} -fatal 7 ${SVLib} ${SVLibPath} +IDV_TRACE2COV=1 +TRACE2COV_ENABLE=1 -suppress 3829 ${CoverageVsimArg}
|
||||
vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} $temp0 $temp1 $temp2 $temp3 -fatal 7 ${SVLib} ${SVLibPath} -suppress 3829 ${CoverageVsimArg}
|
||||
vsim -lib ${WKDIR} testbenchopt +TEST=${TESTSUITE} $temp0 $temp1 $temp2 $temp3 -fatal 7 ${SVLib} ${SVLibPath} ${OtherFlags} ${FCTRACE2COV} -suppress 3829 ${CoverageVsimArg}
|
||||
|
||||
# vsim -lib wkdir/work_${1}_${2} testbenchopt -fatal 7 -suppress 3829
|
||||
# power add generates the logging necessary for said generation.
|
||||
@ -215,12 +218,17 @@ if { ${GUI} } {
|
||||
}
|
||||
}
|
||||
|
||||
if {$ccov || $FunctCoverage} {
|
||||
if {$ccov} {
|
||||
set UCDB ${WALLY}/sim/questa/ucdb/${CFG}_${TESTSUITE}.ucdb
|
||||
echo "Saving coverage to ${UCDB}"
|
||||
coverage save -instance /testbench/dut/core ${UCDB}
|
||||
}
|
||||
|
||||
if {$FunctCoverage} {
|
||||
set UCDB ${WALLY}/sim/questa/fcov_ucdb/${CFG}_${TESTSUITE}.ucdb
|
||||
coverage save -onexit ${UCDB}
|
||||
}
|
||||
|
||||
run -all
|
||||
# power off -r /dut/core/*
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user