From abecc98563ccb7e4dfaa82bdbe009e58e54b322c Mon Sep 17 00:00:00 2001 From: David Harris Date: Tue, 16 Jan 2024 10:26:00 -0800 Subject: [PATCH] Fixed spelling of precision --- src/fpu/fctrl.sv | 2 +- src/fpu/fcvt.sv | 4 ++-- src/fpu/postproc/fmashiftcalc.sv | 2 +- src/fpu/postproc/postprocess.sv | 4 ++-- 4 files changed, 6 insertions(+), 6 deletions(-) diff --git a/src/fpu/fctrl.sv b/src/fpu/fctrl.sv index 3d1a7bedd..d1e933142 100755 --- a/src/fpu/fctrl.sv +++ b/src/fpu/fctrl.sv @@ -38,7 +38,7 @@ module fctrl import cvw::*; #(parameter cvw_t P) ( input logic FDivBusyE, // is the divider busy // instruction input logic [31:0] InstrD, // the full instruction - input logic [6:0] Funct7D, // bits 31:25 of instruction - may contain percision + input logic [6:0] Funct7D, // bits 31:25 of instruction - may contain precision input logic [6:0] OpD, // bits 6:0 of instruction input logic [4:0] Rs2D, // bits 24:20 of instruction input logic [2:0] Funct3D, // bits 14:12 of instruction - may contain rounding mode diff --git a/src/fpu/fcvt.sv b/src/fpu/fcvt.sv index d396fee95..d721dbc2f 100644 --- a/src/fpu/fcvt.sv +++ b/src/fpu/fcvt.sv @@ -70,8 +70,8 @@ module fcvt import cvw::*; #(parameter cvw_t P) ( assign IntToFp = OpCtrl[2]; // choose the ouptut format depending on the opperation - // - fp -> fp: OpCtrl contains the percision of the output - // - int -> fp: Fmt contains the percision of the output + // - fp -> fp: OpCtrl contains the precision of the output + // - int -> fp: Fmt contains the precision of the output if (P.FPSIZES == 2) assign OutFmt = IntToFp ? Fmt : (OpCtrl[1:0] == P.FMT); else if (P.FPSIZES == 3 | P.FPSIZES == 4) diff --git a/src/fpu/postproc/fmashiftcalc.sv b/src/fpu/postproc/fmashiftcalc.sv index c80748061..0a8ac3035 100644 --- a/src/fpu/postproc/fmashiftcalc.sv +++ b/src/fpu/postproc/fmashiftcalc.sv @@ -50,7 +50,7 @@ module fmashiftcalc import cvw::*; #(parameter cvw_t P) ( // calculate the sum's exponent assign PreNormSumExp = FmaSe + {{P.NE+2-$unsigned($clog2(3*P.NF+5)){1'b1}}, ~FmaSCnt} + (P.NE+2)'(P.NF+3); - //convert the sum's exponent into the proper percision + //convert the sum's exponent into the proper precision if (P.FPSIZES == 1) begin assign NormSumExp = PreNormSumExp; end else if (P.FPSIZES == 2) begin diff --git a/src/fpu/postproc/postprocess.sv b/src/fpu/postproc/postprocess.sv index 05db352cd..ba897a5fd 100644 --- a/src/fpu/postproc/postprocess.sv +++ b/src/fpu/postproc/postprocess.sv @@ -128,8 +128,8 @@ module postprocess import cvw::*; #(parameter cvw_t P) ( assign NaNIn = XNaN|YNaN|ZNaN; // choose the ouptut format depending on the opperation - // - fp -> fp: OpCtrl contains the percision of the output - // - otherwise: Fmt contains the percision of the output + // - fp -> fp: OpCtrl contains the precision of the output + // - otherwise: Fmt contains the precision of the output if (P.FPSIZES == 2) assign OutFmt = IntToFp|~CvtOp ? Fmt : (OpCtrl[1:0] == P.FMT); else if (P.FPSIZES == 3 | P.FPSIZES == 4)