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Fixes coremark. Maybe works with verilator.

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Rose Thompson 2024-01-06 00:41:57 -06:00
parent c1e12e3145
commit ab07d64195
1 changed files with 9 additions and 1 deletions
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testbench/testbench.sv
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@ -387,7 +387,15 @@ module testbench;
end
end
end
// *** 06 January 2024 RT: may have to uncomment this block for vcs/verilator
integer adrindex;
if (P.UNCORE_RAM_SUPPORTED)
always @(posedge clk)
if (ResetMem) // program memory is sometimes reset
for (adrindex=0; adrindex<(P.UNCORE_RAM_RANGE>>1+(P.XLEN/32)); adrindex = adrindex+1)
dut.uncore.uncore.ram.ram.memory.RAM[adrindex] = '0;
////////////////////////////////////////////////////////////////////////////////
// Actual hardware
////////////////////////////////////////////////////////////////////////////////