From aabebdb59f7de888fc1eee183c4666a0a4928bb8 Mon Sep 17 00:00:00 2001
From: David Harris <david_harris@hmc.edu>
Date: Thu, 8 Apr 2021 13:40:16 -0400
Subject: [PATCH] fixed sim-wally-32ic

---
 wally-pipelined/regression/sim-wally-batch-rv32ic | 3 +++
 wally-pipelined/regression/sim-wally-rv32ic       | 4 +---
 wally-pipelined/testbench/testbench-imperas.sv    | 6 +++---
 3 files changed, 7 insertions(+), 6 deletions(-)
 create mode 100755 wally-pipelined/regression/sim-wally-batch-rv32ic

diff --git a/wally-pipelined/regression/sim-wally-batch-rv32ic b/wally-pipelined/regression/sim-wally-batch-rv32ic
new file mode 100755
index 000000000..b69fb3172
--- /dev/null
+++ b/wally-pipelined/regression/sim-wally-batch-rv32ic
@@ -0,0 +1,3 @@
+vsim -c <<!
+do wally-pipelined-batch.do ../config/rv32ic rv32ic
+!
diff --git a/wally-pipelined/regression/sim-wally-rv32ic b/wally-pipelined/regression/sim-wally-rv32ic
index b69fb3172..279f6ab71 100755
--- a/wally-pipelined/regression/sim-wally-rv32ic
+++ b/wally-pipelined/regression/sim-wally-rv32ic
@@ -1,3 +1 @@
-vsim -c <<!
-do wally-pipelined-batch.do ../config/rv32ic rv32ic
-!
+vsim -do "do wally-pipelined.do ../config/rv32ic"
\ No newline at end of file
diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv
index b55eb53e5..2eece874c 100644
--- a/wally-pipelined/testbench/testbench-imperas.sv
+++ b/wally-pipelined/testbench/testbench-imperas.sv
@@ -351,8 +351,8 @@ string tests32i[] = {
         if (`C_SUPPORTED) tests = {tests, tests64ic};
         else              tests = {tests, tests64iNOc};
         if (`M_SUPPORTED) tests = {tests, tests64m};
-        if (`F_SUPPORTED) tests = {tests64f, tests};
-        if (`D_SUPPORTED) tests = {tests64d, tests};
+//        if (`F_SUPPORTED) tests = {tests64f, tests};
+//        if (`D_SUPPORTED) tests = {tests64d, tests};
         if (`A_SUPPORTED) tests = {tests, tests64a};
       end
  //     tests = {tests64a, tests};
@@ -362,7 +362,7 @@ string tests32i[] = {
       if (`C_SUPPORTED % 2 == 1) tests = {tests, tests32ic};    
       else                       tests = {tests, tests32iNOc};
       if (`M_SUPPORTED % 2 == 1) tests = {tests, tests32m};
-      if (`F_SUPPORTED) tests = {tests32f, tests};
+//      if (`F_SUPPORTED) tests = {tests32f, tests};
       if (`A_SUPPORTED) tests = {tests, tests32a};
     end
   string signame, memfilename;