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fdivsqrtfsm conditional on IDIV (fixed typo)

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David Harris 2022-12-27 22:16:48 -08:00
parent 5b7e814670
commit a9d7aa568a
1 changed files with 1 additions and 1 deletions
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pipelined/src/fpu/fdivsqrt/fdivsqrtfsm.sv
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@ -105,7 +105,7 @@ module fdivsqrtfsm(
always_comb begin
if (SqrtE) fbits = Nf + 2 + 2; // Nf + two fractional bits for round/guard + 2 for right shift by up to 2
else fbits = Nf + 2 + `LOGR; // Nf + two fractional bits for round/guard + integer bits - try this when placing results in msbs
if (`IDIV_ON_FPU) cycles = MDUE ? ((nE + 1)/`DIVCOPIES)) : (fbits + (`LOGR*`DIVCOPIES)-1)/(`LOGR*`DIVCOPIES);
if (`IDIV_ON_FPU) cycles = MDUE ? ((nE + 1)/`DIVCOPIES) : (fbits + (`LOGR*`DIVCOPIES)-1)/(`LOGR*`DIVCOPIES);
else cycles = (fbits + (`LOGR*`DIVCOPIES)-1)/(`LOGR*`DIVCOPIES);
end