diff --git a/Makefile b/Makefile
index 97e61f47e..33eeea45d 100644
--- a/Makefile
+++ b/Makefile
@@ -48,10 +48,12 @@ imperasdv_cov:
 	vcover report -details -html sim/riscv.ucdb
 
 funcovreg:
-	iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m --cover
+	#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m --cover
 	#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/I --cover
 	#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/privilege --cover
 	#iter-elf.bash --search ${WALLY}/tests/riscof/work/wally-riscv-arch-test/rv64i_m/Q --cover
+	rm -f ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/*/src/*/dut/my.elf
+	iter-elf.bash --search ${WALLY}/tests/riscof/work/riscv-arch-test/rv64i_m/I --cover
 	vcover report -details -html sim/riscv.ucdb
 
 coverage:
diff --git a/sim/questa/coverage b/sim/questa/coverage
new file mode 100755
index 000000000..038253911
--- /dev/null
+++ b/sim/questa/coverage
@@ -0,0 +1,2 @@
+# recompile coverage tests and run coverage including them
+pushd $WALLY/tests/coverage; make; popd; ./regression-wally -coverage
diff --git a/sim/sim-buildroot b/sim/questa/sim-buildroot
similarity index 100%
rename from sim/sim-buildroot
rename to sim/questa/sim-buildroot
diff --git a/sim/sim-buildroot-batch b/sim/questa/sim-buildroot-batch
similarity index 100%
rename from sim/sim-buildroot-batch
rename to sim/questa/sim-buildroot-batch
diff --git a/sim/sim-imperas b/sim/questa/sim-imperas
similarity index 100%
rename from sim/sim-imperas
rename to sim/questa/sim-imperas
diff --git a/sim/sim-testfloat b/sim/questa/sim-testfloat
similarity index 100%
rename from sim/sim-testfloat
rename to sim/questa/sim-testfloat
diff --git a/sim/sim-testfloat-batch b/sim/questa/sim-testfloat-batch
similarity index 100%
rename from sim/sim-testfloat-batch
rename to sim/questa/sim-testfloat-batch
diff --git a/sim/sim-testfloat-verilator b/sim/questa/sim-testfloat-verilator
similarity index 100%
rename from sim/sim-testfloat-verilator
rename to sim/questa/sim-testfloat-verilator
diff --git a/sim/sim-wally b/sim/questa/sim-wally
similarity index 100%
rename from sim/sim-wally
rename to sim/questa/sim-wally
diff --git a/sim/sim-wally-batch b/sim/questa/sim-wally-batch
similarity index 100%
rename from sim/sim-wally-batch
rename to sim/questa/sim-wally-batch
diff --git a/sim/wave-dos/ahb-muldiv.do b/sim/questa/wave-dos/ahb-muldiv.do
similarity index 100%
rename from sim/wave-dos/ahb-muldiv.do
rename to sim/questa/wave-dos/ahb-muldiv.do
diff --git a/sim/wave-dos/ahb-waves.do b/sim/questa/wave-dos/ahb-waves.do
similarity index 100%
rename from sim/wave-dos/ahb-waves.do
rename to sim/questa/wave-dos/ahb-waves.do
diff --git a/sim/wave-dos/cache-waves.do b/sim/questa/wave-dos/cache-waves.do
similarity index 100%
rename from sim/wave-dos/cache-waves.do
rename to sim/questa/wave-dos/cache-waves.do
diff --git a/sim/wave-dos/default-waves.do b/sim/questa/wave-dos/default-waves.do
similarity index 100%
rename from sim/wave-dos/default-waves.do
rename to sim/questa/wave-dos/default-waves.do
diff --git a/sim/wave-dos/generic.do b/sim/questa/wave-dos/generic.do
similarity index 100%
rename from sim/wave-dos/generic.do
rename to sim/questa/wave-dos/generic.do
diff --git a/sim/wave-dos/linux-waves.do b/sim/questa/wave-dos/linux-waves.do
similarity index 100%
rename from sim/wave-dos/linux-waves.do
rename to sim/questa/wave-dos/linux-waves.do
diff --git a/sim/wave-dos/peripheral-waves.do b/sim/questa/wave-dos/peripheral-waves.do
similarity index 100%
rename from sim/wave-dos/peripheral-waves.do
rename to sim/questa/wave-dos/peripheral-waves.do
diff --git a/sim/run_vcs.sh b/sim/vcs/run_vcs.sh
similarity index 100%
rename from sim/run_vcs.sh
rename to sim/vcs/run_vcs.sh
diff --git a/sim/verilate b/sim/verilator/verilate
similarity index 100%
rename from sim/verilate
rename to sim/verilator/verilate
diff --git a/sim/wsim b/sim/wsim
new file mode 100755
index 000000000..c02b8accd
--- /dev/null
+++ b/sim/wsim
@@ -0,0 +1,33 @@
+#!/usr/bin/python3
+#
+# wsim
+# David_Harris@hmc.edu 5 April 2024
+# Invoke a Wally simulation for a desired configuration and test suite or ELF on the specified simulator
+# usage: wsim CONFIG TESTSUITE [-s/--sim SIMULATOR] [-g/--gui]
+# example: wsim rv64gc arch64i
+# example: wsim rv64gc tests/riscof/work/riscv-arch-test/rv64i_m/I/src/ref/ref.elf
+# example: wsim rv32i arch32i -s verilator
+#
+# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1
+
+import argparse
+
+# Read arguments
+parser = argparse.ArgumentParser()
+parser.add_argument("config", help="Configuration file")
+parser.add_argument("testsuite", help="Test suite or ELF file")
+parser.add_argument("--sim", "-s", help="Simulator", choices=["questa", "verilator", "vcs"], default="questa")
+parser.add_argument("--gui", "-g", help="Simulate with GUI", action="store_true")
+args = parser.parse_args()
+print("Config: " + args.config + " tests " + args.testsuite + " sim " + args.sim + " gui " + str(args.gui))
+
+if (args.sim == "questa"):
+    cmd = "do wally-batch.do " + args.config + " " + args.testsuite
+    system("vsim -c -do \"" + cmd + "\"")
+elif (args.sim == "verilator"):
+    print("Running Verilator")
+elif (args.sim == "vcs"):
+    print("Running VCS")
+else:
+    print("Unknown simulator")
+    exit(1)
\ No newline at end of file
diff --git a/sim/wally.xrun b/sim/xcelium/wally.xrun
similarity index 100%
rename from sim/wally.xrun
rename to sim/xcelium/wally.xrun