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Simplify FSM
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@ -103,7 +103,7 @@ module fdivsqrtfsm(
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if (SpecialCase) state <= #1 DONE;
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if (SpecialCase) state <= #1 DONE;
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else state <= #1 BUSY;
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else state <= #1 BUSY;
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end else if (state == BUSY) begin
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end else if (state == BUSY) begin
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if ((~|step[`DURLEN-1:1]&step[0])|WZero) begin
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if ((step == 1) | WZero) begin
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state <= #1 DONE;
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state <= #1 DONE;
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end
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end
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step <= step - 1;
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step <= step - 1;
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