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Removed irrelevant comments in ahblite and made it more clear when to use certain transmission signals

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slmnemo 2022-06-10 20:43:56 -07:00
parent d6a1ee1141
commit a79737e95b
2 changed files with 10 additions and 7 deletions
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2
pipelined/src/ebu/ahblite.sv
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@ -119,7 +119,7 @@ module ahblite (
else if (LSUTransComplete) NextBusState = IDLE; else if (LSUTransComplete) NextBusState = IDLE;
else NextBusState = MEMREAD; else NextBusState = MEMREAD;
MEMWRITE: if (LSUTransComplete & IFUBusRead) NextBusState = INSTRREAD; MEMWRITE: if (LSUTransComplete & IFUBusRead) NextBusState = INSTRREAD;
else if (LSUTransComplete) NextBusState = IDLE;// Ram cannot handle a read after a write, Do not send one. else if (LSUTransComplete) NextBusState = IDLE;
else NextBusState = MEMWRITE; else NextBusState = MEMWRITE;
INSTRREAD: if (IFUTransComplete & LSUBusRead) NextBusState = MEMREAD; INSTRREAD: if (IFUTransComplete & LSUBusRead) NextBusState = MEMREAD;
else if (IFUTransComplete & LSUBusWrite) NextBusState = MEMWRITE; else if (IFUTransComplete & LSUBusWrite) NextBusState = MEMWRITE;

15
pipelined/src/lsu/busfsm.sv
View File

@ -80,7 +80,7 @@ module busfsm #(parameter integer WordCountThreshold,
(* mark_debug = "true" *) busstatetype BusCurrState, BusNextState; (* mark_debug = "true" *) busstatetype BusCurrState, BusNextState;
// Used to send address for address stage of AHB.
flopenr #(LOGWPL) flopenr #(LOGWPL)
WordCountReg(.clk(clk), WordCountReg(.clk(clk),
.reset(reset | CntReset), .reset(reset | CntReset),
@ -88,6 +88,7 @@ module busfsm #(parameter integer WordCountThreshold,
.d(NextWordCount), .d(NextWordCount),
.q(WordCount)); .q(WordCount));
// Used to store data from data phase of AHB.
flopenr #(LOGWPL) flopenr #(LOGWPL)
WordCountDelayedReg(.clk(clk), WordCountDelayedReg(.clk(clk),
.reset(reset | CntReset), .reset(reset | CntReset),
@ -98,8 +99,8 @@ module busfsm #(parameter integer WordCountThreshold,
assign NextWordCount = WordCount + 1'b1; assign NextWordCount = WordCount + 1'b1;
assign PreCntEn = (BusCurrState == STATE_BUS_FETCH) | (BusCurrState == STATE_BUS_WRITE); assign PreCntEn = (BusCurrState == STATE_BUS_FETCH) | (BusCurrState == STATE_BUS_WRITE);
assign WordCountFlag = (WordCountDelayed == WordCountThreshold[LOGWPL-1:0]); assign WordCountFlag = (WordCountDelayed == WordCountThreshold[LOGWPL-1:0]); // Detect when we are waiting on the final access.
assign CntEn = (PreCntEn & LSUBusAck | (LSUBusInit)) & ~WordCountFlag & ~UnCachedRW; assign CntEn = (PreCntEn & LSUBusAck | (LSUBusInit)) & ~WordCountFlag & ~UnCachedRW; // Want to count when doing cache accesses and we aren't wrapping up.
assign UnCachedAccess = ~CACHE_ENABLED | ~CacheableM; assign UnCachedAccess = ~CACHE_ENABLED | ~CacheableM;
@ -145,9 +146,11 @@ module busfsm #(parameter integer WordCountThreshold,
assign LSUBurstType = (UnCachedRW) ? 3'b0 : LocalBurstType; // Don't want to use burst when doing an Uncached Access. assign LSUBurstType = (UnCachedRW) ? 3'b0 : LocalBurstType; // Don't want to use burst when doing an Uncached Access.
assign LSUTransComplete = (UnCachedRW) ? LSUBusAck : WordCountFlag & LSUBusAck; assign LSUTransComplete = (UnCachedRW) ? LSUBusAck : WordCountFlag & LSUBusAck;
assign LSUTransType = (|WordCount) & ~UnCachedRW ? 2'b11 : (LSUBusRead | LSUBusWrite) & (~WordCountFlag | ~CACHE_ENABLED) ? 2'b10 : 2'b00; // Use SEQ if not doing first word, NONSEQ if doing the first read/write, and IDLE if finishing up.
assign LSUTransType = (|WordCount) & ~UnCachedRW ? 2'b11 : (LSUBusRead | LSUBusWrite) & (~LSUTransComplete) ? 2'b10 : 2'b00;
assign CntReset = BusCurrState == STATE_BUS_READY & ~(DCacheFetchLine | DCacheWriteLine) | (WordCountFlag & LSUBusAck); // Reset if we aren't initiating a transaction or if we are finishing a transaction.
assign CntReset = BusCurrState == STATE_BUS_READY & ~(DCacheFetchLine | DCacheWriteLine) | LSUTransComplete;
assign BusStall = (BusCurrState == STATE_BUS_READY & ~IgnoreRequest & ((UnCachedAccess & (|LSURWM)) | DCacheFetchLine | DCacheWriteLine)) | assign BusStall = (BusCurrState == STATE_BUS_READY & ~IgnoreRequest & ((UnCachedAccess & (|LSURWM)) | DCacheFetchLine | DCacheWriteLine)) |
(BusCurrState == STATE_BUS_UNCACHED_WRITE) | (BusCurrState == STATE_BUS_UNCACHED_WRITE) |
(BusCurrState == STATE_BUS_UNCACHED_READ) | (BusCurrState == STATE_BUS_UNCACHED_READ) |