fixed testbench to work with cvw parameterization

This commit is contained in:
Kevin Kim 2023-10-21 11:37:29 -07:00
parent bfca11d475
commit a70f106b5d

View File

@ -1128,7 +1128,7 @@ module testbenchfp;
endmodule
module readvectors (
module readvectors import cvw::*; #(parameter cvw_t P) (
input logic clk,
input logic [P.FLEN*4+7:0] TestVector,
input logic [P.FMTBITS-1:0] ModFmt,
@ -1159,7 +1159,7 @@ module readvectors (
);
localparam Q_LEN = 32'd128;
`include "parameter-defs.vh"
//`include "parameter-defs.vh"
logic XEn;
logic YEn;