From a6545a0f471531a1cc7611368137183714fc5307 Mon Sep 17 00:00:00 2001
From: Limnanthes Serafini <lserafini@hmc.edu>
Date: Tue, 11 Apr 2023 19:29:51 -0700
Subject: [PATCH] Logger significantly improved.

---
 testbench/testbench.sv | 29 +++++++++++++++++++----------
 1 file changed, 19 insertions(+), 10 deletions(-)

diff --git a/testbench/testbench.sv b/testbench/testbench.sv
index 281c69df1..417956ed4 100644
--- a/testbench/testbench.sv
+++ b/testbench/testbench.sv
@@ -557,31 +557,38 @@ end
 
   if (`ICACHE_SUPPORTED && `I_CACHE_ADDR_LOGGER) begin : ICacheLogger
     int    file;
-	string LogFile;
-	logic  resetD, resetEdge;
+    string LogFile;
+    logic  resetD, resetEdge;
     logic  Enable;
     // assign Enable = ~dut.core.StallD & ~dut.core.FlushD & dut.core.ifu.bus.icache.CacheRWF[1] & ~reset;
     
     // this version of Enable allows for accurate eviction logging.
     // Likely needs further improvement.
-    assign Enable = dut.core.ifu.bus.icache.icache.cachefsm.LRUWriteEn & ~reset;
-	flop #(1) ResetDReg(clk, reset, resetD);
-	assign resetEdge = ~reset & resetD;
+    assign Enable = dut.core.ifu.bus.icache.icache.cachefsm.LRUWriteEn & 
+                    dut.core.ifu.immu.immu.pmachecker.Cacheable &
+                    ~dut.core.ifu.bus.icache.icache.cachefsm.FlushStage &
+                    ~reset;
+	  flop #(1) ResetDReg(clk, reset, resetD);
+	  assign resetEdge = ~reset & resetD;
+
+    flop #(1) InvalReg(clk, dut.core.ifu.InvalidateICacheM, InvalDelayed);
+	  assign InvalEdge = dut.core.ifu.InvalidateICacheM & ~InvalDelayed;
+
     initial begin
-	  LogFile = $psprintf("ICache.log");
+	    LogFile = $psprintf("ICache.log");
       file = $fopen(LogFile, "w");
-	  $fwrite(file, "BEGIN %s\n", memfilename);
-	end
+	    $fwrite(file, "BEGIN %s\n", memfilename);
+	  end
     string AccessTypeString, HitMissString;
     assign HitMissString = dut.core.ifu.bus.icache.icache.CacheHit ? "H" :
                            dut.core.ifu.bus.icache.icache.vict.cacheLRU.AllValid ? "E" : "M";
-    assign AccessTypeString = dut.core.ifu.InvalidateICacheM ? "I" : "R";
     always @(posedge clk) begin
 	  if(resetEdge) $fwrite(file, "TRAIN\n");
 	  if(Begin) $fwrite(file, "BEGIN %s\n", memfilename);
 	  if(Enable) begin  // only log i cache reads
-	    $fwrite(file, "%h %s %s\n", dut.core.ifu.PCPF, AccessTypeString, HitMissString);
+	    $fwrite(file, "%h R %s\n", dut.core.ifu.PCPF, HitMissString);
 	  end
+    if(InvalEdge) $fwrite(file, "0 I X\n");
 	  if(EndSample) $fwrite(file, "END %s\n", memfilename);
     end
   end
@@ -612,6 +619,7 @@ end
     // Likely needs further improvement.
     assign Enabled = dut.core.lsu.bus.dcache.dcache.cachefsm.LRUWriteEn &
                      ~dut.core.lsu.bus.dcache.dcache.cachefsm.FlushStage &
+                     dut.core.lsu.dmmu.dmmu.pmachecker.Cacheable &
                      (AccessTypeString != "NULL");
 
     initial begin
@@ -625,6 +633,7 @@ end
 	  if(Enabled) begin
 	    $fwrite(file, "%h %s %s\n", dut.core.lsu.PAdrM, AccessTypeString, HitMissString);
 	  end
+    if(dut.core.lsu.bus.dcache.dcache.cachefsm.FlushFlag) $fwrite(file, "0 F X\n");
 	  if(EndSample) $fwrite(file, "END %s\n", memfilename);
     end
   end