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https://github.com/openhwgroup/cvw
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Merge pull request #999 from rosethompson/main
Removes conflicting FPGA zsbl file
This commit is contained in:
commit
a03ecd0d97
102
fpga/zsbl/bios.S
102
fpga/zsbl/bios.S
@ -1,102 +0,0 @@
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#include "system.h"
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PERIOD = (SYSTEMCLOCK / 2)
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.section .init
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.global _start
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.type _start, @function
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_start:
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# Initialize global pointer
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.option push
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.option norelax
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1:auipc gp, %pcrel_hi(__global_pointer$)
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addi gp, gp, %pcrel_lo(1b)
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.option pop
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li x1, 0
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li x2, 0
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li x4, 0
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li x5, 0
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li x6, 0
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li x7, 0
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li x8, 0
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li x9, 0
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li x10, 0
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li x11, 0
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li x12, 0
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li x13, 0
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li x14, 0
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li x15, 0
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li x16, 0
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li x17, 0
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li x18, 0
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li x19, 0
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li x20, 0
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li x21, 0
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li x22, 0
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li x23, 0
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li x24, 0
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li x25, 0
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li x26, 0
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li x27, 0
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li x28, 0
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li x29, 0
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li x30, 0
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li x31, 0
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# set the stack pointer to the top of memory - 8 bytes (pointer size)
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li sp, (EXT_MEM_END - 8)
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li a0, 0x00000000
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li a1, EXT_MEM_BASE
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#li a2, 128*1024*1024/512 # copy 128MB
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li a2, 127*1024*1024/512 # copy 127MB upper 1MB contains the return address (ra)
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#li a2, 800 # copy 400KB
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jal ra, copyFlash
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fence.i
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# now toggle led so we know the copy completed.
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# write to gpio
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li t2, 0xFF
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la t3, 0x1006000C
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li t4, 5
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loop:
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# delay
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li t0, PERIOD/2
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delay1:
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addi t0, t0, -1
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bge t0, x0, delay1
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sw t2, 0x0(t3)
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li t0, PERIOD/2
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delay2:
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addi t0, t0, -1
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bge t0, x0, delay2
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sw x0, 0x0(t3)
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addi t4, t4, -1
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bgt t4, x0, loop
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# now that the card is copied and the led toggled we
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# jump to the copied contents of the sd card.
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jumpToLinux:
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csrrs a0, 0xF14, x0 # copy hart ID to a0
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li a1, FDT_ADDRESS # This is the device tree address
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la a2, end_of_bios
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li t0, EXT_MEM_BASE # start of code
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jalr x0, t0, 0
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end_of_bios:
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