From 9eed875886fa797979c2fcda706d1eddeea0226c Mon Sep 17 00:00:00 2001 From: Shreya Sanghai Date: Tue, 16 Mar 2021 16:06:40 -0400 Subject: [PATCH] added global history branch predictor --- .../config/busybear/wally-config.vh | 1 + .../config/coremark/wally-config.vh | 1 + wally-pipelined/config/rv32ic/wally-config.vh | 1 + wally-pipelined/config/rv64ic/wally-config.vh | 1 + .../config/rv64icfd/wally-config.vh | 1 + wally-pipelined/src/ifu/bpred.sv | 34 ++++-- .../src/ifu/globalHistoryPredictor.sv | 110 ++++++++++++++++++ .../testbench/testbench-imperas.sv | 2 +- 8 files changed, 142 insertions(+), 9 deletions(-) create mode 100644 wally-pipelined/src/ifu/globalHistoryPredictor.sv diff --git a/wally-pipelined/config/busybear/wally-config.vh b/wally-pipelined/config/busybear/wally-config.vh index dc4d64515..f61df4283 100644 --- a/wally-pipelined/config/busybear/wally-config.vh +++ b/wally-pipelined/config/busybear/wally-config.vh @@ -89,3 +89,4 @@ `define TWO_BIT_PRELOAD "../config/busybear/twoBitPredictor.txt" `define BTB_PRELOAD "../config/busybear/BTBPredictor.txt" +`define BPTYPE "BPGLOBAL" // BPGLOBAL or BPTWOBIT diff --git a/wally-pipelined/config/coremark/wally-config.vh b/wally-pipelined/config/coremark/wally-config.vh index 69a490fb3..0418a1b8d 100644 --- a/wally-pipelined/config/coremark/wally-config.vh +++ b/wally-pipelined/config/coremark/wally-config.vh @@ -92,3 +92,4 @@ `define TWO_BIT_PRELOAD "../config/coremark/twoBitPredictor.txt" `define BTB_PRELOAD "../config/coremark/BTBPredictor.txt" +`define BPTYPE "BPGLOBAL" // BPGLOBAL or BPTWOBIT diff --git a/wally-pipelined/config/rv32ic/wally-config.vh b/wally-pipelined/config/rv32ic/wally-config.vh index e68f84161..0f9e1eafa 100644 --- a/wally-pipelined/config/rv32ic/wally-config.vh +++ b/wally-pipelined/config/rv32ic/wally-config.vh @@ -88,3 +88,4 @@ `define TWO_BIT_PRELOAD "../config/rv32ic/twoBitPredictor.txt" `define BTB_PRELOAD "../config/rv32ic/BTBPredictor.txt" +`define BPTYPE "BPGLOBAL" // BPGLOBAL or BPTWOBIT diff --git a/wally-pipelined/config/rv64ic/wally-config.vh b/wally-pipelined/config/rv64ic/wally-config.vh index 6fa712720..390417d63 100644 --- a/wally-pipelined/config/rv64ic/wally-config.vh +++ b/wally-pipelined/config/rv64ic/wally-config.vh @@ -91,3 +91,4 @@ `define TWO_BIT_PRELOAD "../config/rv64ic/twoBitPredictor.txt" `define BTB_PRELOAD "../config/rv64ic/BTBPredictor.txt" +`define BPTYPE "BPGLOBAL" // BPGLOBAL or BPTWOBIT diff --git a/wally-pipelined/config/rv64icfd/wally-config.vh b/wally-pipelined/config/rv64icfd/wally-config.vh index be8d7c8a7..c907df536 100644 --- a/wally-pipelined/config/rv64icfd/wally-config.vh +++ b/wally-pipelined/config/rv64icfd/wally-config.vh @@ -91,3 +91,4 @@ `define TWO_BIT_PRELOAD "../config/rv64icfd/twoBitPredictor.txt" `define BTB_PRELOAD "../config/rv64icfd/BTBPredictor.txt" +`define BPTYPE "BPGLOBAL" // BPGLOBAL or BPTWOBIT diff --git a/wally-pipelined/src/ifu/bpred.sv b/wally-pipelined/src/ifu/bpred.sv index 35ac6cfb5..ad0f25d5a 100644 --- a/wally-pipelined/src/ifu/bpred.sv +++ b/wally-pipelined/src/ifu/bpred.sv @@ -66,14 +66,32 @@ module bpred // Part 1 branch direction prediction - twoBitPredictor DirPredictor(.clk(clk), - .reset(reset), - .LookUpPC(PCNextF), - .Prediction(BPPredF), - // update - .UpdatePC(PCE), - .UpdateEN(InstrClassE[0]), - .UpdatePrediction(UpdateBPPredE)); +generate + if (`BPTYPE == "BPTWOBIT") begin:Predictor + twoBitPredictor DirPredictor(.clk(clk), + .reset(reset), + .LookUpPC(PCNextF), + .Prediction(BPPredF), + // update + .UpdatePC(PCE), + .UpdateEN(InstrClassE[0]), + .UpdatePrediction(UpdateBPPredE)); + + end else if (`BPTYPE == "BPGLOBAL") begin:Predictor + + globalHistoryPredictor DirPredictor(.clk(clk), + .reset(reset), + .*, // Stalls and flushes + .LookUpPC(PCNextF), + .Prediction(BPPredF), + // update + .UpdatePC(PCE), + .UpdateEN(InstrClassE[0]), + .PCSrcE(PCSrcE), + .UpdatePrediction(UpdateBPPredE)); + end +endgenerate + // this predictor will have two pieces of data, // 1) A direction (1 = Taken, 0 = Not Taken) diff --git a/wally-pipelined/src/ifu/globalHistoryPredictor.sv b/wally-pipelined/src/ifu/globalHistoryPredictor.sv new file mode 100644 index 000000000..58e3f514d --- /dev/null +++ b/wally-pipelined/src/ifu/globalHistoryPredictor.sv @@ -0,0 +1,110 @@ +/////////////////////////////////////////// +// globalHistoryPredictor.sv +// +// Written: Shreya Sanghai +// Email: ssanghai@hmc.edu +// Created: March 16, 2021 +// Modified: +// +// Purpose: Global History Branch predictor with parameterized global history register +// +// A component of the Wally configurable RISC-V project. +// +// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University +// +// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation +// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy, +// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software +// is furnished to do so, subject to the following conditions: +// +// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software. +// +// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES +// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS +// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT +// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. +/////////////////////////////////////////// + +`include "wally-config.vh" + +module globalHistoryPredictor + #(parameter int k = 10 + ) + (input logic clk, + input logic reset, + input logic StallF, StallD, StallE, FlushF, FlushD, FlushE, + input logic [`XLEN-1:0] LookUpPC, + output logic [1:0] Prediction, + // update + input logic [`XLEN-1:0] UpdatePC, + input logic UpdateEN, PCSrcE, /// *** need to add as input from bpred.sv + input logic [1:0] UpdatePrediction + + ); + localparam int Depth = 2^k; + logic [k-1:0] GHRF, GHRD, GHRE; + + flopenr #(k) GlobalHistoryRegister(.clk(clk), + .reset(reset), + .en(UpdateEN), + .d({PCSrcE, GHRF[k-1:1] }), + .q(GHRF)); + + + + logic [1:0] PredictionMemory; + logic DoForwarding, DoForwardingF; + logic [1:0] UpdatePredictionF; + + // for gshare xor the PC with the GHR + // TODO: change in sram memory2 module + // assign UpdatePCIndex = GHRE ^ UpdatePC; + // assign LookUpPCIndex = LookUpPC ^ GHR; + // Make Prediction by reading the correct address in the PHT and also update the new address in the PHT + // GHR referes to the address that the past k branches points to in the prediction stage + // GHRE refers to the address that the past k branches points to in the exectution stage + SRAM2P1R1W #(Depth, 2) PHT(.clk(clk), + .reset(reset), + .RA1(GHRF), + .RD1(PredictionMemory), + .REN1(1'b1), + .WA1(GHRE), + .WD1(UpdatePrediction), + .WEN1(UpdateEN), + .BitWEN1(2'b11)); + + + // need to forward when updating to the same address as reading. + // first we compare to see if the update and lookup addreses are the same + assign DoForwarding = GHRF == GHRE; + + // register the update value and the forwarding signal into the Fetch stage + // TODO: add stall logic *** + flopr #(1) DoForwardingReg(.clk(clk), + .reset(reset), + .d(DoForwarding), + .q(DoForwardingF)); + + flopr #(2) UpdatePredictionReg(.clk(clk), + .reset(reset), + .d(UpdatePrediction), + .q(UpdatePredictionF)); + + assign Prediction = DoForwardingF ? UpdatePredictionF : PredictionMemory; + + //pipeline for GHR + flopenrc #(k) GHRDReg(.clk(clk), + .reset(reset), + .en(~StallD), + .clear(FlushD), + .d(GHRF), + .q(GHRD)); + + flopenrc #(k) GHREReg(.clk(clk), + .reset(reset), + .en(~StallE), + .clear(FlushE), + .d(GHRD), + .q(GHRE)); + +endmodule diff --git a/wally-pipelined/testbench/testbench-imperas.sv b/wally-pipelined/testbench/testbench-imperas.sv index 3c9c4cc91..916420a93 100644 --- a/wally-pipelined/testbench/testbench-imperas.sv +++ b/wally-pipelined/testbench/testbench-imperas.sv @@ -474,7 +474,7 @@ string tests32i[] = { // initialize the branch predictor initial begin - $readmemb(`TWO_BIT_PRELOAD, dut.hart.ifu.bpred.DirPredictor.memory.memory); + $readmemb(`TWO_BIT_PRELOAD, dut.hart.ifu.bpred.Predictor.DirPredictor.PHT.memory); $readmemb(`BTB_PRELOAD, dut.hart.ifu.bpred.TargetPredictor.memory.memory); end