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Starting to extend fpu conditional coverage, reformating ifu test cases
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@ -67,6 +67,7 @@ main:
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# fcvt.w.q a0, ft0
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# fcvt.q.d ft3, ft0
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# Completing branch coverage in fctrl.sv
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.word 0x38007553 // Testing the all False case for 119 - funct7 under, op = 101 0011
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.word 0x40000053 // Line 145 All False Test case - illegal instruction?
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.word 0xd0400053 // Line 156 All False Test case - illegal instruction?
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@ -74,6 +75,11 @@ main:
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.word 0xd2400053 // Line 168 All False Test case - illegal instruction?
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.word 0xc2400053 // Line 174 All False Test case - illegal instruction?
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# Increasing conditional coverage in fctrl.sv
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.word 0xc5000007 // Attempting to toggle (Op7 != 7) to 0 on line 97 in fctrl, not sure what instruction this works out to
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.word 0xe0101053 // toggling (Rs2D == 0) to 0 on line 139 in fctrl. Illegal Intsr (like fclass but incorrect rs2)
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.word 0xe0100053 // toggling (Rs2D == 0) to 0 on line 141 in fctrl. Illegal Intsr (like fmv but incorrect rs2)
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# Test illegal instructions are detected
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.word 0x00000007 // illegal floating-point load (bad Funct3)
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.word 0x00000027 // illegal floating-point store (bad Funct3)
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@ -35,20 +35,12 @@ main:
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//.hword 0x2000 // CL type compressed floating-point ld-->funct3,imm,rs1',imm,rd',op
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// binary version 0000 0000 0000 0000 0010 0000 0000 0000
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mv s0, sp
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c.fld fs0, 0(s0)
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c.fld fs0, 0(s0) // Previously uncovered instructions
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c.fsd fs0, 0(s0)
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.hword 0x2002 // c.fldsp fs0, 0
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.hword 0xA002 // c.fsdsp fs0, 0
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.hword 0x9C41 // line 134 Illegal compressed instruction
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c.fsd fs0, 0(s0)
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// c.fldsp fs0, 0
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.hword 0x2002
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// c.fsdsp fs0, 0
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.hword 0xA002
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//# Illegal compressed instruction with op = 01, instr[15:10] = 100111, and 0's everywhere else
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//.hword 0x9C01
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# Line Illegal compressed instruction
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.hword 0x9C41
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//.hword 0x9C01 //# Illegal compressed instruction with op = 01, instr[15:10] = 100111, and 0's everywhere else
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j done
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