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	Updated the hazard logic for CMO operations.
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				@ -425,5 +425,7 @@ module controller import cvw::*;  #(parameter cvw_t P) (
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  // the synchronous DTIM cannot read immediately after write
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  // a cache cannot read or write immediately after a write
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  // atomic operations are also detected as MemRWD[1]
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  assign StoreStallD = MemRWE[0] & ((MemRWD[1] | (MemRWD[0] & P.DCACHE_SUPPORTED)));
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  //assign StoreStallD = MemRWE[0] & ((MemRWD[1] | (MemRWD[0] & P.DCACHE_SUPPORTED)));
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  // *** RT: Modify for ZICBOZ
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  assign StoreStallD = (MemRWE[0] | (|CMOpE & P.ZICBOM_SUPPORTED)) & ((MemRWD[1] | (MemRWD[0] & P.DCACHE_SUPPORTED) | (|CMOpD & P.ZICBOM_SUPPORTED)));
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endmodule
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