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https://github.com/openhwgroup/cvw
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Updated imperas.ic files so rv32 follows rv64
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@ -9,7 +9,7 @@
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#--showcommands
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#--showcommands
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# Core settings
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# Core settings
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--variant RV32GC # for RV32GC
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--variant RV32GCK # for RV32GC
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--override cpu/priv_version=1.12
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--override cpu/priv_version=1.12
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--override cpu/user_version=20191213
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--override cpu/user_version=20191213
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# arch
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# arch
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@ -59,7 +59,7 @@
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#--override cpu/instret_undefined=T
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#--override cpu/instret_undefined=T
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#--override cpu/hpmcounter_undefined=T
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#--override cpu/hpmcounter_undefined=T
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## context registers not implemented
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# context registers not implemented
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#--override cpu/scontext_undefined=True
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#--override cpu/scontext_undefined=True
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#--override cpu/mcontext_undefined=True
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#--override cpu/mcontext_undefined=True
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@ -69,9 +69,14 @@
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#--override cpu/Zicfilp=F
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#--override cpu/Zicfilp=F
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--override cpu/trigger_num=0 # disable CSRs 7a0-7a8
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--override cpu/trigger_num=0 # disable CSRs 7a0-7a8
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--override no_pseudo_inst=T # For code coverage, don't produce pseudoinstructions
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# For code coverage, don't produce pseudoinstructions
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--override no_pseudo_inst=T
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--override show_c_prefix=T # Show "c." with compressed instructions
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# Show "c." with compressed instructions
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--override show_c_prefix=T
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# nonratified mnoise register not implemented
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--override cpu/mnoise_undefined=T
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# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag
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# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag
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#--override cpu/ecode_mask=0x8000000F # for RV32
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#--override cpu/ecode_mask=0x8000000F # for RV32
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@ -80,7 +85,8 @@
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# Debug mode not yet supported
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# Debug mode not yet supported
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--override cpu/debug_mode=none
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--override cpu/debug_mode=none
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# Zkr entropy source and seed register not supported.
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--override cpu/Zkr=F
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--override cpu/reset_address=0x80000000
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--override cpu/reset_address=0x80000000
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@ -73,7 +73,7 @@
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# Show "c." with compressed instructions
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# Show "c." with compressed instructions
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--override show_c_prefix=T
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--override show_c_prefix=T
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# nonratified mnosie register not implemented
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# nonratified mnoise register not implemented
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--override cpu/mnoise_undefined=T
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--override cpu/mnoise_undefined=T
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# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag
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# mcause and scause only have 4 lsbs of code and 1 msb of interrupt flag
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@ -86,8 +86,6 @@
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# Zkr entropy source and seed register not supported.
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# Zkr entropy source and seed register not supported.
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--override cpu/Zkr=F
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--override cpu/Zkr=F
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--override cpu/reset_address=0x80000000
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--override cpu/reset_address=0x80000000
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--override cpu/unaligned=T # Zicclsm (should be true)
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--override cpu/unaligned=T # Zicclsm (should be true)
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