diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/find_csr.sh b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/find_csr.sh deleted file mode 100755 index 89d0f098f..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/find_csr.sh +++ /dev/null @@ -1,2 +0,0 @@ -#grep '=>.*csr' $1 | rev | cut -d' ' -f1 | rev | tee >(cut -d',' -f1) | cut -d',' -f2 | grep -Ev 'a[0-7]|t[0-6]|zero|[0-8]' | sort | uniq | paste -s -d, - -grep 'csr' /mnt/scratch/riscv_decodepc_threads/riscv_decodepc.txt.disassembly | rev | cut -d' ' -f1 | rev | tee >(cut -d',' -f1 | sort -u) >(cut -d',' -f2 | sort -u) | (cut -d',' -f3 | sort -u) | sort -u | paste -s -d, - diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/fix_csrs.py b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/fix_csrs.py deleted file mode 100755 index ded24c9f1..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/fix_csrs.py +++ /dev/null @@ -1,28 +0,0 @@ -#! /usr/bin/python3 -import sys, fileinput - -sys.stderr.write("reminder: fix_csrs.py is nothing but hardcoded hackery to combat QEMU's faulty printing") - -csrs = ['fcsr','mcause','mcounteren','medeleg','mepc','mhartid','mideleg','mie','mip','misa','mscratch','mstatus','mtval','mtvec','pmpaddr0','pmpcfg0','satp','scause','scounteren','sepc','sie','sscratch','sstatus','stval','stvec'] - -# just for now, since these CSRs aren't yet ready to be checked in testbench-linux -list(map(csrs.remove, ['fcsr','mhartid','pmpcfg0','pmpaddr0','mip'])) -output_path = sys.argv[1]+'/' -print(f'output dir: {output_path}') -count = 0 -csr = '' -with open('{}parsedCSRs.txt'.format(output_path), 'w') as fixedCSRs: - with open('{}/intermediate-outputs/unfixedParsedCSRs.txt'.format(output_path), 'r') as rawCSRs: - for l in rawCSRs: - fixedCSRs.write(l) - count += 1 - if '---' in l: - count = 0 - if (count%2 == 1): # every other line is CSR name - csr = l - else: - if ('stval' in csr) and ('8020007e' in l): - print('Adding stvec vector') - fixedCSRs.write('stvec\n') - fixedCSRs.write('ffffffff800000b0\n') - diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/logAllBuildroot.sh b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/logAllBuildroot.sh deleted file mode 100755 index 44d7410f4..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/logAllBuildroot.sh +++ /dev/null @@ -1,15 +0,0 @@ -# Oftentimes this script runs so long you'll go to sleep. -# But you don't want the script to die when your computer goes to sleep. -# So consider invoking this with nohup (i.e. "nohup ./logAllBuildroot.sh") -# You can run "tail -f nohup.out" to see what would've -# outputted to the terminal if you didn't use nohup - -customQemu="/courses/e190ax/qemu_sim/rv64_initrd/qemu_experimental/qemu/build/qemu-system-riscv64" -#customQemu="qemu-system-riscv64" -imageDir="../buildroot-image-output" -intermedDir="../linux-testvectors/intermediate-outputs" -outDir="../linux-testvectors" - -# - Logs info needed by buildroot testbench -($customQemu -M virt -nographic -bios $imageDir/fw_jump.elf -kernel $imageDir/Image -append "root=/dev/vda ro" -initrd $imageDir/rootfs.cpio -d nochain,cpu,in_asm -serial /dev/null -singlestep -gdb tcp::1236 -S 2>&1 >/dev/null | ./parse_qemu.py | ./parse_gdb_output.py "$outDir") & riscv64-unknown-elf-gdb -x gdbinit_qemulog -./fix_csrs.py "$outDir" diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/parseAllBusybear.sh b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/parseAllBusybear.sh deleted file mode 100755 index bee05019b..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/parseAllBusybear.sh +++ /dev/null @@ -1 +0,0 @@ -./combineGDBs.py && cat gdbcombined.txt | ./parse_gdb_output.py "/courses/e190ax/busybear_boot_new/" diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/parse_gdb_output.py b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/parse_gdb_output.py deleted file mode 100755 index 6887d5f96..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/parse_gdb_output.py +++ /dev/null @@ -1,173 +0,0 @@ -#! /usr/bin/python3 -import sys, fileinput - -sys.stderr.write("reminder: parse_gdb_output.py takes input from stdin\n") - -csrs = ['fcsr','mcause','mcounteren','medeleg','mepc','mhartid','mideleg','mie','mip','misa','mscratch','mstatus','mtval','mtvec','pmpaddr0','pmpcfg0','satp','scause','scounteren','sepc','sie','sscratch','sstatus','stval','stvec'] - -# just for now, since these CSRs aren't yet ready to be checked in testbench-linux -list(map(csrs.remove, ['fcsr','mhartid','pmpcfg0','pmpaddr0','mip'])) -#output_path = '/courses/e190ax/busybear_boot_new/' -#output_path = '/courses/e190ax/buildroot_boot/' -output_path = sys.argv[1]+'/' -print(f'output dir: {output_path}') -instrs = -1 -try: - with open('{}parsedPC.txt'.format(output_path), 'w') as wPC: - with open('{}parsedRegs.txt'.format(output_path), 'w') as wReg: - with open('{}parsedMemRead.txt'.format(output_path), 'w') as wMem: - with open('{}parsedMemWrite.txt'.format(output_path), 'w') as wMemW: - with open('{}/intermediate-outputs/unfixedParsedCSRs.txt'.format(output_path), 'w') as wCSRs: - firstCSR = True - curCSRs = {} - lastRead = '' - currentRead = '' - readOffset = '' - lastReadLoc = '' - readType = '' - lastReadType = '' - readLoc = '' - lineOffset = -1 - lastRegs = '' - curRegs = '' - storeReg = '' - storeOffset = '' - storeLoc = '' - storeAMO = '' - lastAMO = '' - lastStoreReg = '' - lastStoreLoc = '' - for l in fileinput.input('-'): - l = l.split("#")[0].rstrip() - if l.startswith('=>'): - # Begin new instruction - instrs += 1 - storeAMO = '' - if instrs % 10000 == 0: - print(instrs,flush=True) - # Instr in human assembly - wPC.write('{} ***\n'.format(' '.join(l.split(':')[1].split()[0:2]))) - if '\tld' in l or '\tlw' in l or '\tlh' in l or '\tlb' in l: - currentRead = l.split()[-1].split(',')[0] - if len(l.split()[-1].split(',')) < 2: - print(l) - readOffset = l.split()[-1].split(',')[1].split('(')[0] - readLoc = l.split()[-1].split(',')[1].split('(')[1][:-1] - readType = l.split()[-2] - if 'amo' in l: - currentRead = l.split()[-1].split(',')[0] - readOffset = "0" - readLoc = l.split()[-1].split('(')[1][:-1] - readType = l.split()[-2] - storeOffset = "0" - storeLoc = readLoc - storeReg = l.split()[-1].split(',')[1] - storeAMO = l.split()[-2] - if '\tlr' in l: - currentRead = l.split()[-1].split(',')[0] - readOffset = "0" - readLoc = l.split()[-1].split('(')[1][:-1] - readType = "0" # *** I don't see that readType or lastReadType are ever used; we can probably get rid of them - if '\tsc' in l: - storeOffset = "0" - storeLoc = l.split()[-1].split('(')[1][:-1] - storeReg = l.split()[-1].split(',')[1] - if '\tsd' in l or '\tsw' in l or '\tsh' in l or '\tsb' in l: - s = l.split('#')[0].split()[-1] - storeReg = s.split(',')[0] - if len(s.split(',')) < 2: - print(s) - print(l) - if len(s.split(',')[1].split('(')) < 1: - print(s) - print(l) - storeOffset = s.split(',')[1].split('(')[0] - storeLoc = s.split(',')[1].split('(')[1][:-1] - lineOffset = 0 - elif lineOffset != -1: - lineOffset += 1 - if lineOffset == 1: - # Instr in hex comes one line after the instruction - wPC.write('{}\n'.format(l.split()[-1][2:])) - # As well as instr address - wPC.write('{}\n'.format(l.split()[0][2:].strip(":"))) - elif lineOffset <= (1+32): - # Next 32 lines are the Register File - if lastRead == l.split()[0]: - readData = int(l.split()[1][2:], 16) - #readData <<= (8 * (lastReadLoc % 8)) <-- this was used to make byte and half-word instructions match what the bus unit sees in RV64. However, it is no longer needed because the testvectors are now compared against what the hart sees (not what the bus unit sees). - wMem.write('{:x}\n'.format(readData)) - if readLoc == l.split()[0]: - readLoc = l.split()[1][2:] - if storeReg == l.split()[0]: - storeReg = l.split()[1] - if storeLoc == l.split()[0]: - storeLoc = l.split()[1][2:] - if lineOffset > (1+1): - # Start logging x1 onwards (we don't care about x0) - curRegs += '{}\n'.format(l.split()[1][2:]) - #elif "pc" in l: - # wPC.write('{}\n'.format(l.split()[1][2:])) - if any([csr == l.split()[0] for csr in csrs]): - if l.split()[0] in curCSRs: - if curCSRs[l.split()[0]] != l.split()[1]: - if firstCSR: - wCSRs.write('---\n') - firstCSR = False - wCSRs.write('{}\n{}\n'.format(l.split()[0], l.split()[1][2:])) - else: - wCSRs.write('{}\n{}\n'.format(l.split()[0], l.split()[1][2:])) - curCSRs[l.split()[0]] = l.split()[1] - if '-----' in l: # end of each cycle - if curRegs != lastRegs: - if lastRegs == '': - wReg.write(curRegs) - else: - for i in range(32): - if curRegs.split('\n')[i] != lastRegs.split('\n')[i]: - wReg.write('{}\n'.format(i+1)) - wReg.write('{}\n'.format(curRegs.split('\n')[i])) - break - lastRegs = curRegs - if lastAMO != '': - if 'amoadd' in lastAMO: - lastStoreReg = hex(int(lastStoreReg[2:], 16) + readData)[2:] - elif 'amoand' in lastAMO: - lastStoreReg = hex(int(lastStoreReg[2:], 16) & readData)[2:] - elif 'amoor' in lastAMO: - lastStoreReg = hex(int(lastStoreReg[2:], 16) | readData)[2:] - elif 'amoswap' in lastAMO: - lastStoreReg = hex(int(lastStoreReg[2:], 16))[2:] - else: - print(lastAMO) - exit() - #print('lastStoreReg {}\n'.format(lastStoreReg)) - #print('lastStoreLoc '+str(lastStoreLoc)) - wMemW.write('{}\n'.format(lastStoreReg)) - wMemW.write('{:x}\n'.format(int(lastStoreLoc, 16))) - if storeReg != '' and storeOffset != '' and storeLoc != '' and storeAMO == '': - storeLocOffset = int(storeOffset,10) + int(storeLoc, 16) - #wMemW.write('{:x}\n'.format(int(storeReg, 16) << (8 * (storeLocOffset % 8)))) - wMemW.write('{}\n'.format(storeReg[2:])) - wMemW.write('{:x}\n'.format(storeLocOffset)) - if readOffset != '' and readLoc != '': - wMem.write('{:x}\n'.format(int(readOffset,10) + int(readLoc, 16))) - lastReadLoc = int(readOffset,10) + int(readLoc, 16) - lastReadType = readType - readOffset = '' - readLoc = '' - curRegs = '' - lineOffset = -1 - lastRead = currentRead - currentRead = '' - lastStoreReg = storeReg - lastStoreLoc = storeLoc - storeReg = '' - storeOffset = '' - storeLoc = '' - lastAMO = storeAMO - - -except (FileNotFoundError): - print('please give gdb output file as argument') - diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/setup_OVP.sh b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/setup_OVP.sh deleted file mode 100755 index 66cd899d8..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/setup_OVP.sh +++ /dev/null @@ -1,7 +0,0 @@ -#!/bin/bash -source /cad/riscv/OVP/Imperas.20200630/bin/setup.sh -setupImperas /cad/riscv/OVP/Imperas.20200630 -m32 -source /cad/riscv/OVP/Imperas.20200630/bin/switchRuntime.sh 2>/dev/null -echo 1 | switchRuntimeImperas -source /cad/riscv/OVP/Imperas.20200630/bin/switchISS.sh 2>/dev/null -echo 1 | switchISSImperas diff --git a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/start_OVP.sh b/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/start_OVP.sh deleted file mode 100755 index 7d2815c13..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/deprecated-scripts/start_OVP.sh +++ /dev/null @@ -1,2 +0,0 @@ -#!/bin/bash -sh /cad/riscv/OVP/Imperas.20200630/Demo/Platforms/riscv_RV64GC_Virtio_Linux/harness/RUN_Virtio_Linux.sh --gdbconsole --gdbinit /mnt/scratch/riscv_testbench/gdbinit diff --git a/wally-pipelined/linux-testgen/testvector-generation/gdbinit b/wally-pipelined/linux-testgen/testvector-generation/gdbinit deleted file mode 100755 index f41e2398b..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/gdbinit +++ /dev/null @@ -1,15 +0,0 @@ -set pagination off -set logging overwrite on -set logging redirect on -set logging file /mnt/scratch/riscv_testbench/riscv_boot_regs.txt -set logging on -x/i $pc -x/x $pc -info all-registers -while ($pc != 0xffffffe000018fa4) - si - x/i $pc - x/x $pc - info all-registers -end -set logging off diff --git a/wally-pipelined/linux-testgen/testvector-generation/gdbinit_mem b/wally-pipelined/linux-testgen/testvector-generation/gdbinit_mem deleted file mode 100755 index f8c20fa11..000000000 --- a/wally-pipelined/linux-testgen/testvector-generation/gdbinit_mem +++ /dev/null @@ -1,23 +0,0 @@ -set pagination off -target extended-remote :1235 -set logging overwrite on -set logging redirect on -printf "Creating bootmemGDB.txt\n" -set logging file ../linux-testvectors/intermediate-outputs/bootmemGDB.txt -set logging on -x/4096xb 0x1000 -set logging off -printf "Creating bootmem_untrimmed_GDB.txt\n" -printf "Warning - please verify that the second half of bootmem_untrimmed_GDB.txt is all 0s\n" -set logging file ../linux-testvectors/intermediate-outputs/bootmem_untrimmed_GDB.txt -set logging on -x/8192xb 0x1000 -set logging off -printf "Creating ramGDB.txt\n" -set logging file ../linux-testvectors/intermediate-outputs/ramGDB.txt -set logging on -x/134217728xb 0x80000000 -set logging off -set confirm off -kill -q