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https://github.com/openhwgroup/cvw
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renamed u to udigit to avoid conflict with U
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@ -31,7 +31,7 @@
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`include "wally-config.vh"
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`include "wally-config.vh"
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module fdivsqrtfgen4 (
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module fdivsqrtfgen4 (
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input logic [3:0] u,
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input logic [3:0] udigit,
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input logic [`DIVb+3:0] C, U, UM,
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input logic [`DIVb+3:0] C, U, UM,
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output logic [`DIVb+3:0] F
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output logic [`DIVb+3:0] F
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);
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);
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@ -47,9 +47,9 @@ module fdivsqrtfgen4 (
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// Choose which adder input will be used
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// Choose which adder input will be used
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always_comb
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always_comb
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if (u[3]) F = F2;
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if (udigit[3]) F = F2;
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else if (u[2]) F = F1;
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else if (udigit[2]) F = F1;
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else if (u[1]) F = FN1;
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else if (udigit[1]) F = FN1;
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else if (u[0]) F = FN2;
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else if (udigit[0]) F = FN2;
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else F = F0;
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else F = F0;
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endmodule
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endmodule
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@ -35,7 +35,7 @@ module fdivsqrtqsel4 (
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input logic [4:0] Smsbs,
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input logic [4:0] Smsbs,
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input logic [`DIVb+3:0] WS, WC,
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input logic [`DIVb+3:0] WS, WC,
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input logic Sqrt, j1,
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input logic Sqrt, j1,
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output logic [3:0] u
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output logic [3:0] udigit
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);
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);
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logic [6:0] Wmsbs;
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logic [6:0] Wmsbs;
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logic [7:0] PreWmsbs;
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logic [7:0] PreWmsbs;
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@ -107,6 +107,6 @@ module fdivsqrtqsel4 (
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else if (Smsbs == 5'b10000) A = 3'b111;
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else if (Smsbs == 5'b10000) A = 3'b111;
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else A = Smsbs[2:0];
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else A = Smsbs[2:0];
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end else A = Dmsbs;
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end else A = Dmsbs;
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assign u = USel4[{A,Wmsbs}];
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assign udigit = USel4[{A,Wmsbs}];
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endmodule
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endmodule
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@ -46,7 +46,7 @@ module fdivsqrtstage4 (
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/* verilator lint_on UNOPTFLAT */
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/* verilator lint_on UNOPTFLAT */
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logic [`DIVb+3:0] Dsel;
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logic [`DIVb+3:0] Dsel;
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logic [3:0] u;
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logic [3:0] udigit;
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logic [`DIVb+3:0] F;
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logic [`DIVb+3:0] F;
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logic [`DIVb+3:0] AddIn;
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logic [`DIVb+3:0] AddIn;
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logic [4:0] Smsbs;
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logic [4:0] Smsbs;
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@ -61,11 +61,11 @@ module fdivsqrtstage4 (
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// 0010 = -1
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// 0010 = -1
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// 0001 = -2
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// 0001 = -2
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assign Smsbs = U[`DIVb:`DIVb-4];
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assign Smsbs = U[`DIVb:`DIVb-4];
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fdivsqrtqsel4 qsel4(.D, .Smsbs, .WS, .WC, .Sqrt(SqrtM), .j1, .u);
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fdivsqrtqsel4 qsel4(.D, .Smsbs, .WS, .WC, .Sqrt(SqrtM), .j1, .udigit);
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fdivsqrtfgen4 fgen4(.u, .C({2'b11, CNext}), .U({3'b000, U}), .UM({3'b000, UM}), .F);
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fdivsqrtfgen4 fgen4(.udigit, .C({2'b11, CNext}), .U({3'b000, U}), .UM({3'b000, UM}), .F);
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always_comb
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always_comb
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case (u)
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case (udigit)
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4'b1000: Dsel = DBar2;
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4'b1000: Dsel = DBar2;
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4'b0100: Dsel = DBar;
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4'b0100: Dsel = DBar;
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4'b0000: Dsel = '0;
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4'b0000: Dsel = '0;
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@ -77,10 +77,10 @@ module fdivsqrtstage4 (
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// Partial Product Generation
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// Partial Product Generation
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// WSA, WCA = WS + WC - qD
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// WSA, WCA = WS + WC - qD
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assign AddIn = SqrtM ? F : Dsel;
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assign AddIn = SqrtM ? F : Dsel;
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assign CarryIn = ~SqrtM & (u[3] | u[2]); // +1 for 2's complement of -D and -2D
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assign CarryIn = ~SqrtM & (udigit[3] | udigit[2]); // +1 for 2's complement of -D and -2D
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csa #(`DIVb+4) csa(WS, WC, AddIn, CarryIn, WSA, WCA);
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csa #(`DIVb+4) csa(WS, WC, AddIn, CarryIn, WSA, WCA);
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fdivsqrtuotfc4 fdivsqrtuotfc4(.u, .Sqrt(SqrtM), .C(CNext[`DIVb:0]), .U, .UM, .UNext, .UMNext);
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fdivsqrtuotfc4 fdivsqrtuotfc4(.udigit, .Sqrt(SqrtM), .C(CNext[`DIVb:0]), .U, .UM, .UNext, .UMNext);
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assign un = 0; // unused for radix 4
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assign un = 0; // unused for radix 4
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endmodule
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endmodule
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@ -31,7 +31,7 @@
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`include "wally-config.vh"
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`include "wally-config.vh"
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module fdivsqrtuotfc4(
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module fdivsqrtuotfc4(
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input logic [3:0] u,
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input logic [3:0] udigit,
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input logic Sqrt,
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input logic Sqrt,
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input logic [`DIVb:0] U, UM,
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input logic [`DIVb:0] U, UM,
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input logic [`DIVb:0] C,
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input logic [`DIVb:0] C,
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@ -47,19 +47,19 @@ module fdivsqrtuotfc4(
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assign K3 = (C & ~(C << 2)); // 3K
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assign K3 = (C & ~(C << 2)); // 3K
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always_comb begin
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always_comb begin
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if (u[3]) begin
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if (udigit[3]) begin
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UNext = U | K2;
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UNext = U | K2;
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UMNext = U | K1;
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UMNext = U | K1;
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end else if (u[2]) begin
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end else if (udigit[2]) begin
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UNext = U | K1;
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UNext = U | K1;
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UMNext = U;
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UMNext = U;
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end else if (u[1]) begin
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end else if (udigit[1]) begin
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UNext = UM | K3;
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UNext = UM | K3;
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UMNext = UM | K2;
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UMNext = UM | K2;
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end else if (u[0]) begin
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end else if (udigit[0]) begin
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UNext = UM | K2;
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UNext = UM | K2;
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UMNext = UM | K1;
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UMNext = UM | K1;
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end else begin // digit = 0
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end else begin // udigit = 0
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UNext = U;
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UNext = U;
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UMNext = UM | K3;
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UMNext = UM | K3;
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end
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end
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