From 9a1fdba077bb0939f918c9f307a6f177a838bd87 Mon Sep 17 00:00:00 2001 From: David Harris Date: Sun, 10 Mar 2024 22:24:16 -0700 Subject: [PATCH] Added more Zbkb tests shared with Zbb --- src/ieu/bmu/bitmanipalu.sv | 2 +- src/ieu/kmu/packer.sv | 17 ++++++------- testbench/tests.vh | 51 +++++++++++++++++++++++++------------- 3 files changed, 43 insertions(+), 27 deletions(-) diff --git a/src/ieu/bmu/bitmanipalu.sv b/src/ieu/bmu/bitmanipalu.sv index 50678e784..add0f2d1f 100644 --- a/src/ieu/bmu/bitmanipalu.sv +++ b/src/ieu/bmu/bitmanipalu.sv @@ -48,7 +48,7 @@ module bitmanipalu import cvw::*; #(parameter cvw_t P) ( logic [P.XLEN-1:0] ZBBResult; // ZBB Result logic [P.XLEN-1:0] ZBCResult; // ZBC Result - logic [P.XLEN-1:0] ZBKBResult; // ZBKB Result + logic [P.XLEN-1:0] ZBKBResult; // ZBKB Result logic [P.XLEN-1:0] ZBKCResult; // ZBKC Result logic [P.XLEN-1:0] ZBKXResult; // ZBKX Result logic [P.XLEN-1:0] ZKNDResult; // ZKND Result diff --git a/src/ieu/kmu/packer.sv b/src/ieu/kmu/packer.sv index 4e59bd03b..fcf2f9eef 100644 --- a/src/ieu/kmu/packer.sv +++ b/src/ieu/kmu/packer.sv @@ -31,10 +31,9 @@ module packer #(parameter WIDTH=32) ( output logic [WIDTH-1:0] PackResult ); - logic [WIDTH/2-1:0] lowhalf, highhalf; - logic [7:0] lowhalfh, highhalfh; - logic [15:0] lowhalfw, highhalfw; - + logic [WIDTH/2-1:0] lowhalf, highhalf; + logic [7:0] lowhalfh, highhalfh; + logic [15:0] lowhalfw, highhalfw; logic [WIDTH-1:0] Pack, PackH, PackW; assign lowhalf = A[WIDTH/2-1:0]; @@ -46,10 +45,10 @@ module packer #(parameter WIDTH=32) ( assign Pack = {highhalf, lowhalf}; assign PackH = {{(WIDTH-16){1'b0}}, highhalfh, lowhalfh}; - assign PackW = {{(WIDTH-32){highhalfw[15]}}, highhalfw, lowhalfw}; + assign PackW = (WIDTH == 64) ? {{(WIDTH-32){highhalfw[15]}}, highhalfw, lowhalfw} : Pack; // not implemented for RV32; treat as Pack to simplify logic in result mux - always_comb - if (PackSelect[1:0] == 2'b11) PackResult = PackH; - else if (PackSelect[2] == 1'b0) PackResult = Pack; - else PackResult = PackW; + always_comb + if (PackSelect[1:0] == 2'b11) PackResult = PackH; + else if (PackSelect[2] == 1'b0) PackResult = Pack; + else PackResult = PackW; endmodule diff --git a/testbench/tests.vh b/testbench/tests.vh index b611691db..1e676b8cb 100644 --- a/testbench/tests.vh +++ b/testbench/tests.vh @@ -994,15 +994,6 @@ string imperas32f[] = '{ "rv32i_m/B/src/bseti-01.S" }; - string arch32zbkb[] = '{ - `RISCVARCHTEST, - "rv32i_m/K/src/brev8_32-01.S", - "rv32i_m/K/src/pack-01.S", - "rv32i_m/K/src/packh-01.S", - "rv32i_m/K/src/unzip-01.S", - "rv32i_m/K/src/zip-01.S" - }; - string arch32zbkc[] = '{ `RISCVARCHTEST, "rv32i_m/B/src/clmul-01.S", @@ -1041,6 +1032,40 @@ string imperas32f[] = '{ "rv32i_m/K/src/sha512sum1r-01.S" }; + string arch32zbkb[] = '{ + `RISCVARCHTEST, + "rv32i_m/B/src/ror-01.S", + "rv32i_m/B/src/rol-01.S", + "rv32i_m/B/src/rori-01.S", + "rv32i_m/B/src/andn-01.S", + "rv32i_m/B/src/orn-01.S", + "rv32i_m/B/src/xnor-01.S", + "rv32i_m/B/src/rev8_32-01.S", + "rv32i_m/K/src/pack-01.S", + "rv32i_m/K/src/packh-01.S", + "rv32i_m/K/src/brev8_32-01.S", + "rv32i_m/K/src/zip-01.S", + "rv32i_m/K/src/unzip-01.S" + }; + + string arch64zbkb[] = '{ + `RISCVARCHTEST, + "rv64i_m/B/src/ror-01.S", + "rv64i_m/B/src/rol-01.S", + "rv64i_m/B/src/rori-01.S", + "rv64i_m/B/src/rorw-01.S", + "rv64i_m/B/src/rolw-01.S", + "rv64i_m/B/src/roriw-01.S", + "rv64i_m/B/src/andn-01.S", + "rv64i_m/B/src/orn-01.S", + "rv64i_m/B/src/xnor-01.S", + "rv64i_m/B/src/rev8-01.S", + "rv64i_m/K/src/pack-01.S", + "rv64i_m/K/src/packh-01.S", + "rv64i_m/K/src/packw-01.S", + "rv64i_m/K/src/brev8-01.S" + }; + string arch64m[] = '{ `RISCVARCHTEST, "rv64i_m/M/src/div-01.S", @@ -1799,14 +1824,6 @@ string arch64zbs[] = '{ "rv64i_m/B/src/bseti-01.S" }; -string arch64zbkb[] = '{ - `RISCVARCHTEST, - "rv64i_m/K/src/brev8-01.S", - "rv64i_m/K/src/pack-01.S", - "rv64i_m/K/src/packh-01.S", - "rv64i_m/K/src/packw-01.S" -}; - string arch64zbkc[] = '{ `RISCVARCHTEST, "rv64i_m/B/src/clmul-01.S",