diff --git a/tests/custom/debug/Makefile b/tests/custom/debug/Makefile
index ddabe4e31..7f3fd926e 100644
--- a/tests/custom/debug/Makefile
+++ b/tests/custom/debug/Makefile
@@ -4,6 +4,7 @@ TARGET = debug
 
 $(TARGET).signature.output: $(TARGET).elf.memfile $(TARGET).elf
 	spike --isa=rv64gc +signature=$(TARGET).signature.output +signature-granularity=4 $(TARGET).elf
+	riscv_sim_RV64 debug.elf -T debug.sig
 #	diff --ignore-case $(TARGET).signature.output $(TARGET).reference_output || exit
 #	echo "Signature matches! Success!"
 	mkdir -p ../work 
diff --git a/tests/custom/debug/debug.S b/tests/custom/debug/debug.S
index e6e00e865..d91229dac 100644
--- a/tests/custom/debug/debug.S
+++ b/tests/custom/debug/debug.S
@@ -18,24 +18,29 @@ rvtest_entry_point:
     fsd f12, 0(a6)
 
     # openhwgroup/cvw Issue #56
-    fld f4, 16(a7)
+    fld f4, 16(a7) # cfa695b1047553b1
     fld f14, 24(a7)
     fsgnjx.s f10,f4,f14  # expected f 0xffffffff7fc00000, hdl has been giving 0xcfa695b1047553b1
-    fsd f19, 8(a6)
+    fsd f19, 16(a6)
 
     # openhwgroup/cvw Issue #57
     fld f0, 32(a7)
     fld f15, 40(a7)
     fsgnjx.s f30,f0,f15  # expected f 0xfffffffffb3754ef, hdl has been giving 0xffffffff7b3754ef
-    fsd f30, 16(a6)
+    fsd f30, 24(a6)
 
     # openhwgroup/cvw Issue #58
     fld f14, 48(a7)
     fclass.s x2, f14 # expected 0x0000000000000200, hdl had been giving 0x0000000000000220
-    sd x2, 24(a6)
+    sd x2, 32(a6)
 
     # fsgnjx.s, fclass.s, fsgnjn.s, fsgnj.s, fneg.s, fabs.s, fmv.s all treat inputs as dp rather than sp
 
+    #openhwgroup/cvw Issue #65 #expected 0xffffffffffffffff, hdl had been giving 0x00000000ffffffff
+    fld f17, 56(a7)
+    fmv.x.s x30, f17
+    sd x30, 40(a6)
+
 
 #########################
 # HTIF and signature
@@ -66,6 +71,7 @@ rvtest_data:
 .dword 0xffffffff7fc00000
 .dword 0xfffffffffb3754ef
 .dword 0x7fefffffffffffff
+.dword 0x00000000ffffffff
 
 .EQU XLEN,64
 begin_signature: