From 0d91076a72c653f89e3c63cc8da275881b199350 Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 15 Aug 2024 06:49:19 -0700 Subject: [PATCH 1/2] Added header for imperas.ic --- sim/imperas.ic | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/sim/imperas.ic b/sim/imperas.ic index 3ad843cf4..aee25eabf 100644 --- a/sim/imperas.ic +++ b/sim/imperas.ic @@ -1,3 +1,8 @@ +# imperas.ic +# Initialization file for ImperasDV lock step simulation +# David_Harris@hmc.edu 15 August 2024 +# SPDX-License-Identifier: Apache-2.0 WITH SHL-2.1 + #--mpdconsole #--gdbconsole #--showoverrides From 8e62c578ea6b7b8b1331b4a919f0aaa9a468fdfa Mon Sep 17 00:00:00 2001 From: David Harris Date: Thu, 15 Aug 2024 10:43:20 -0700 Subject: [PATCH 2/2] Detect illegal writes to URO HPM counters --- src/privileged/csrc.sv | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/src/privileged/csrc.sv b/src/privileged/csrc.sv index d8ce0e709..848cb7e01 100644 --- a/src/privileged/csrc.sv +++ b/src/privileged/csrc.sv @@ -159,11 +159,11 @@ module csrc import cvw::*; #(parameter cvw_t P) ( if (P.XLEN==64) begin // 64-bit counter reads // Veri lator doesn't realize this only occurs for XLEN=64 /* verilator lint_off WIDTH */ - if (CSRAdrM == TIME) CSRCReadValM = MTIME_CLINT; // TIME register is a shadow of the memory-mapped MTIME from the CLINT + if (CSRAdrM == TIME & ~CSRWriteM) CSRCReadValM = MTIME_CLINT; // TIME register is a shadow of the memory-mapped MTIME from the CLINT /* verilator lint_on WIDTH */ else if (CSRAdrM >= MHPMCOUNTERBASE & CSRAdrM < MHPMCOUNTERBASE+P.COUNTERS & CSRAdrM != MTIME) CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; - else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS) + else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS & ~CSRWriteM) // read-only CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; else begin CSRCReadValM = '0; @@ -172,16 +172,16 @@ module csrc import cvw::*; #(parameter cvw_t P) ( end else begin // 32-bit counter reads // Veril ator doesn't realize this only occurs for XLEN=32 /* verilator lint_off WIDTH */ - if (CSRAdrM == TIME) CSRCReadValM = MTIME_CLINT[31:0];// TIME register is a shadow of the memory-mapped MTIME from the CLINT - else if (CSRAdrM == TIMEH) CSRCReadValM = MTIME_CLINT[63:32]; + if (CSRAdrM == TIME & ~CSRWriteM) CSRCReadValM = MTIME_CLINT[31:0];// TIME register is a shadow of the memory-mapped MTIME from the CLINT + else if (CSRAdrM == TIMEH & ~CSRWriteM) CSRCReadValM = MTIME_CLINT[63:32]; /* verilator lint_on WIDTH */ else if (CSRAdrM >= MHPMCOUNTERBASE & CSRAdrM < MHPMCOUNTERBASE+P.COUNTERS & CSRAdrM != MTIME) CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; - else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS) + else if (CSRAdrM >= HPMCOUNTERBASE & CSRAdrM < HPMCOUNTERBASE+P.COUNTERS & ~CSRWriteM) // read-only CSRCReadValM = HPMCOUNTER_REGW[CounterNumM]; else if (CSRAdrM >= MHPMCOUNTERHBASE & CSRAdrM < MHPMCOUNTERHBASE+P.COUNTERS & CSRAdrM != MTIMEH) CSRCReadValM = HPMCOUNTERH_REGW[CounterNumM]; - else if (CSRAdrM >= HPMCOUNTERHBASE & CSRAdrM < HPMCOUNTERHBASE+P.COUNTERS) + else if (CSRAdrM >= HPMCOUNTERHBASE & CSRAdrM < HPMCOUNTERHBASE+P.COUNTERS & ~CSRWriteM) // read-only CSRCReadValM = HPMCOUNTERH_REGW[CounterNumM]; else begin CSRCReadValM = '0;