From 9821a50eaacd1a7605b0480edab64ceeff0b93df Mon Sep 17 00:00:00 2001
From: Kip Macsai-Goren <kipmacsaigoren@gmail.com>
Date: Sun, 18 Sep 2022 00:11:29 +0000
Subject: [PATCH] added mstatus uxl, sxl bit tests (not tested in regression
 yet)

---
 .../WALLY-status-xlen-01.reference_output     |  4 ++
 .../privilege/src/WALLY-status-xlen-01.S      | 51 +++++++++++++++++++
 2 files changed, 55 insertions(+)
 create mode 100644 tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-status-xlen-01.reference_output
 create mode 100644 tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-xlen-01.S

diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-status-xlen-01.reference_output b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-status-xlen-01.reference_output
new file mode 100644
index 000000000..f9469d56a
--- /dev/null
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/references/WALLY-status-xlen-01.reference_output
@@ -0,0 +1,4 @@
+00000000 # Test *** Number : Read out SXL, UXL of mstatus as 2 and 2 for 64 bit systems
+0000000a
+00000000 # read of read-only uxl, sxl bits after attmepted write
+0000000a
diff --git a/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-xlen-01.S b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-xlen-01.S
new file mode 100644
index 000000000..aaeaef110
--- /dev/null
+++ b/tests/wally-riscv-arch-test/riscv-test-suite/rv64i_m/privilege/src/WALLY-status-xlen-01.S
@@ -0,0 +1,51 @@
+///////////////////////////////////////////
+//
+// WALLY-status-xlen
+//
+// Author: Kip Macsai-Goren <kmacsaigoren@g.hmc.edu>
+//
+// Created 2022-09-17
+//
+// Copyright (C) 2021 Harvey Mudd College & Oklahoma State University
+//
+// Permission is hereby granted, free of charge, to any person obtaining a copy of this software and associated documentation
+// files (the "Software"), to deal in the Software without restriction, including without limitation the rights to use, copy,
+// modify, merge, publish, distribute, sublicense, and/or sell copies of the Software, and to permit persons to whom the Software
+// is furnished to do so, subject to the following conditions:
+//
+// The above copyright notice and this permission notice shall be included in all copies or substantial portions of the Software.
+//
+// THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
+// OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
+// BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT
+// OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+///////////////////////////////////////////
+
+#include "WALLY-TEST-LIB-64.h" 
+
+RVTEST_ISA("RV64I")
+RVTEST_CASE(0,"//check ISA:=regex(.*64.*);check ISA:=regex(.*I.*);def TEST_CASE_1=True;",endianness)
+
+INIT_TESTS
+
+TRAP_HANDLER m
+
+// Test ***Number: check that the UXL and SXL bits of mstatus are read only and the correct value (2 for 64 bit systems)
+
+csrr x28, mstatus
+li x29, 0xF00000000 // mask bits for uxl and sxl
+and x28, x28, x29
+sd x28, 0(t1) // should store 0xA00000000 to memory
+addi t1, t1, 8
+addi a6, a6, 8
+
+csrs mstatus, x29 // attempt to write to uxl and sxl, should not work
+csrr x28, mstatus
+and x28, x28, x29
+sd x28, 0(t1) // should store 0xA00000000 to memory
+addi t1, t1, 8
+addi a6, a6, 8
+
+END_TESTS
+
+TEST_STACK_AND_DATA