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Fixed typo in fpga top for arty a7.

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This commit is contained in:
Ross Thompson 2023-07-19 11:37:29 -05:00
parent e4d6a9f8c6
commit 97a16f75dc
2 changed files with 4 additions and 4 deletions
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fpga/src/fpgaTopArtyA7.v
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@ -66,12 +66,12 @@ module fpgaTop
wire HCLKOpen; wire HCLKOpen;
wire HRESETnOpen; wire HRESETnOpen;
wire [31:0] HRDATAEXT; wire [63:0] HRDATAEXT;
wire HREADYEXT; wire HREADYEXT;
wire HRESPEXT; wire HRESPEXT;
wire HSELEXT; wire HSELEXT;
wire [31:0] HADDR; wire [31:0] HADDR;
wire [31:0] HWDATA; wire [63:0] HWDATA;
wire HWRITE; wire HWRITE;
wire [2:0] HSIZE; wire [2:0] HSIZE;
wire [2:0] HBURST; wire [2:0] HBURST;