Github_Repos/cvw
1
0
Fork 1
mirror of https://github.com/openhwgroup/cvw synced 2025-02-11 06:05:49 +00:00
Code Issues Packages Projects Releases Wiki Activity

Merge branch 'main' of https://github.com/davidharrishmc/riscv-wally

Browse Source
This commit is contained in:
David Harris 2022-07-07 22:00:59 +00:00
commit 96a75d7749
2 changed files with 3 additions and 1 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
pipelined/config/shared/wally-shared.vh
View File

@ -101,7 +101,7 @@
`define NORMSHIFTSZ ((`DIVLEN+`NF+3) > (3*`NF+8) ? (`DIVLEN+`NF+3) : (3*`NF+9))
`define CORRSHIFTSZ ((`DIVLEN+`NF+3) > (3*`NF+8) ? (`DIVLEN+`NF+3) : (3*`NF+6))
`define USE_SRAM 1
`define USE_SRAM 0
// Disable spurious Verilator warnings

2
pipelined/src/cache/sram1p1rw.sv vendored
View File

@ -33,6 +33,8 @@
// WIDTH is number of bits in one "word" of the memory, DEPTH is number of such words
`include "wally-config.vh"
module sram1p1rw #(parameter DEPTH=128, WIDTH=256) (
input logic clk,
input logic [$clog2(DEPTH)-1:0] Adr,