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restore graphical buildroot sim

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bbracker 2021-06-18 11:58:16 -04:00
parent 892c14430b
commit 958f60c704
1 changed files with 12 additions and 12 deletions
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24
wally-pipelined/testbench/testbench-linux.sv
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@ -474,18 +474,18 @@ module testbench();
end end
string PCtextD,PCtextE,PCtextM,PCtext2; string PCtextD,PCtextE,PCtextM,PCtext2;
always_ff @(posedge clk, posedge reset) //always_ff @(posedge clk, posedge reset)
if (reset) begin // if (reset) begin
PCtextE <= #1 "(reset)"; // PCtextE <= #1 "(reset)";
PCtextM <= #1 "(reset)"; // PCtextM <= #1 "(reset)";
end else begin // end else begin
if (~dut.hart.StallE) // if (~dut.hart.StallE)
if (dut.hart.FlushE) PCtextE <= #1 "(flushed)"; // if (dut.hart.FlushE) PCtextE <= #1 "(flushed)";
else PCtextE <= #1 PCtextD; // else PCtextE <= #1 PCtextD;
if (~dut.hart.StallM) // if (~dut.hart.StallM)
if (dut.hart.FlushM) PCtextM <= #1 "(flushed)"; // if (dut.hart.FlushM) PCtextM <= #1 "(flushed)";
else PCtextM <= #1 PCtextE; // else PCtextM <= #1 PCtextE;
end // end
initial begin initial begin